HAP-Z1ES
77
Pin No.
Pin Name
I/O
Description
E21
RGMII_TD2
O
RGMII transmit data output to the ethernet transceiver
E22
EIM_EB2
I
Boot mode setting terminal Fixed at “L”
E23
EIM_D22
O
VBUS power on/off control signal output terminal for the USB connector “H”: power on
E24, E25
EIM_D26, EIM_D27
-
Not used
F1
CSI_D3P
-
Not used
F2
CSI_D3M
-
Not used
F3
CSI_CLK0P
-
Not used
F4
CSI_CLK0M
-
Not used
F5 to F8
GND33 to GND36
-
Ground terminal
F9
VDDUSB_CAP1
O
Internal regulator output terminal
F10
USB_H1_DN
I/O
Two-way USB data (negative) with the WLAN/BT COMBO card
F11
PMIC_STBY_REQ
O
Not used
F12
BOOT_MODE1
I
Boot mode setting terminal Fixed at “H”
F13
SD3_DAT7
-
Not used
F14
SD3_DAT1
-
Not used
F15
NANDF_CS0
O
Power on/off control signal output terminal for the learning circuit power “H”: power on
F16
NANDF_D2
-
Not used
F17
SD4_DAT2
I/O
Two-way data bus with the
fl
ash memory
F18
SD1_DAT3
-
Not used
F19
SD2_CMD
-
Not used
F20
RGMII_TD1
O
RGMII transmit data output to the ethernet transceiver
F21, F22
EIM_D17, EIM_D24
-
Not used
F23
EIM_EB3
I
Boot mode setting terminal Fixed at “L”
F24, F25
EIM_A22, EIM_A24
I
Boot mode setting terminal Fixed at “L”
G1
DSI_D0P
-
Not used
G2
DSI_D0M
-
Not used
G3
GND39
-
Ground terminal
G4
DSI_REXT
-
Not used
G5
JTAG_TDI
-
Not used
G6
JTAG_TDO
-
Not used
G7
PCIE_VPH
-
Power supply terminal for the PCIe interface (+2.5V)
G8
PCIE_VPTX
-
Power supply terminal for the PCIe interface (+1.1V)
G9
VDD_SNVS_CAP
O
Internal regulator output terminal
G10
GND37
-
Ground terminal
G11
VDD_SNVS_IN
-
Power supply terminal for the SNVS Regulator (+3.3V)
G12
SATA_VPH
-
Power supply terminal for the SATA interface (+2.5V)
G13
SATA_VP
-
Power supply terminal for the SATA interface (+1.1V)
G14
NVCC_SD3
O
Internal regulator output terminal
G15
NVCC_NANDF
O
Internal regulator output terminal
G16,
G17
NVCC_SD1,
NVCC_SD2
O
Internal regulator output terminal
G18
NVCC_RGMII
-
Power supply terminal for the ENET interface (+1.8V)
G19
GND38
-
Ground terminal
G20
EIM_D20
O
Con
fi
guration signal output to the FPGA
G21,
G22
EIM_D19, EIM_D25
-
Not used
G23
EIM_D28
I
Diag mode enable signal input terminal
G24,
G25
EIM_A17, EIM_A19
I
Boot mode setting terminal Fixed at “L”
H1
DSI_D1P
-
Not used
H2
DSI_D1M
-
Not used
H3
DSI_CLK0M
-
Not used
H4
DSI_CLK0P
-
Not used
H5
JTAG_TCK
-
Not used
H6
JTAG_MOD
-
Not used
H7
PCIE_VP
-
Power supply terminal for the PCIe interface (+1.1V)
H8
GND43
-
Ground terminal
H9
VDDHIGH_IN1
-
Power supply terminal for the +2.5V regulator (+3.3V)
H10
VDDHIGH_CAP1
O
Internal regulator output terminal (+2.5V)
H11
VDDARM23_CAP1
O
Internal regulator output terminal Not used
Summary of Contents for HAP-Z1ES
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