SN8P1829
8-Bit MCU build-in 12-bit ADC + PGIA + Charge-pump Reg 128 dots LCD driver
SONiX TECHNOLOGY CO., LTD
Page 80
Version 1.0
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INTERRUPT
OVERVIEW
The SN8P1829 provides 6 interrupt sources, including four internal interrupts (T0, TC0, TC1 & SIO) and two external
interrupts (INT0 ~ INT1). These external interrupts can wakeup the chip from power down mode to high-speed normal
mode. The external clock input pins of INT0/INT1 are shared with P0.0/P0.1 pins. Once interrupt service is executed,
the GIE bit in STKP register will clear to “0” for stopping other interrupt request. When interrupt service exits, the GIE
bit will set to “1” to accept the next interrupts’ request. All of the interrupt request signals are stored in INTRQ register.
The user can program the chip to check INTRQ’s content for setting executive priority.
INTRQ
6-bit
Latches
T0IRQ
TC0IRQ
TC1IRQ
P00IRQ
Interrupt
enable
gating
Global interrupt request signal
Interrupt vector address (0008H)
T0 time out
TC0 time out
TC1 time out
INTEN Interrupt enable register
INT0 trigger
The interrupt trigger edge :
INT0 ~ INT1 = falling edge
P01IRQ
INT1 trigger
SIOIRQ
SIO time out
Figure 9-1. The 6 Interrupts of SN8P1829
Note: The GIE bit must enable and all interrupt operations work.
