SMART Embedded Computing COMX-CORE-2610-ET, Installation And Use Manual

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COMX-CORE-2610-ET Installation and Use (6806800P11E) 65
Chapter 5
BIOS
5.1 Overview
This product adopts the Phoenix SCT BIOS. It is Phoenix next-generation BIOS firmware
that is based on the Unified Extensible Firmware Interface (UEFI) Specifications and Intel
®
Platform Innovation Framework for Extensible Firmware Interface (EFI). The SCT BIOS is
specifically designed to address firmware portability and extensibility for future platforms. It
supports IA32 and X64 platforms.
5.2 POST
After power-up or reset, the BIOS performs a power-on self-test (POST) that attempts to
determine if further operation is possible and that the detected configuration is expected.
This process can complete normally or result in a warning or an error. The boot process
does not stop after a warning but displays a message on the primary display device. If an
error is detected, the boot process is halted. If possible, a message is displayed but failures
early on in the test can only be indicated by POST codes.
Viewing all checkpoints generated by Phoenix SCT firmware requires a checkpoint card,
also referred to as a POST Card or POST Diagnostic Card. These are PCI or LPC add-in
cards that show the value of I/O port 80h on a LED display. Checkpoint cards are available
through a variety of computer mail-order outlets.
5.3 Boot Process
While performing the functions of the traditional BIOS, Phoenix SCT core follows the
firmware model described by the Intel Platform Innovation Framework for EFI (Framework).
The Framework refers to the following boot phases, which may apply to various status code
descriptions:
 Security (SEC) - initial low-level initialization
 Pre-EFI Initialization (PEI) - memory initialization1
 Driver Execution Environment (DXE) - main hardware initialization2
 Boot Device Selection (BDS) - system setup, pre-OS user interface, and selecting
a bootable device (CD/DVD, HDD, USB, Network, Shell, etc.)