A N 3 3 2
26
Rev. 0.8
Command 0x35. TX
_
RDS
_
BUFF
Loads or clears the RDS group buffer FIFO or circular buffer and returns the FIFO status. The buffer can be
allocated between the circular buffer and FIFO with the TX_RDS_FIFO_SIZE property. A common use case for the
circular buffer is to broadcast group 2A radio text, and a common use case for the FIFO is to broadcast group 4A
real time clock. The command clears the INTACK interrupt bit when the INTACK bit of ARG1 is set. The CTS bit
(and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in
powerup mode.
Note:
TX_RDS_BUFF is supported in FMTX component 2.0 or later.
Available in: Si4711/13/21
Command arguments: Seven
Response bytes: Five
Command
Bit
D7
D6
D5
D4
D3
D2
D1
D0
CMD
0
0
1
1
0
1
0
1
ARG1
FIFO
0
0
0
0
LDBUFF
MTBUFF
INTACK
ARG2
RDSB
H
[7:0]
ARG3
RDSB
L
[7:0]
ARG4
RDSC
H
[7:0]
ARG5
RDSC
L
[7:0]
ARG6
RDSD
H
[7:0]
ARG7
RDSD
L
[7:0]
ARG
Bit
Name
Function
1
7
FIFO
Operate on FIFO.
If set, the command operates on the FIFO buffer. If cleared, the command
operates on the circular buffer.
1
6:3
Reserved
Always write to 0.
1
2
LDBUFF
Load RDS Group Buffer.
If set, loads the RDS group buffer with RDSB, RDSC, and RDSD. Block A
data is generated from the RDS_TX_PI property when the buffer is transmit-
ted.
1
1
MTBUFF
Empty RDS Group Buffer.
If set, empties the RDS group buffer.
1
0
INTACK
Clear RDS Group buffer interrupt.
If set this bit clears the RDS group buffer interrupt indicator.
2
7:0
RDSB
H
[7:0]
RDS Block B High Byte.
This byte in combination with RDSB
L
sets the RDS block B data.