46
007-5806-004
3: System Overview
•
Error detection and correction
–
External memory transfers are protected by cyclic redundancy check (CRC) error
detection. If a memory packet does not checksum, it is retransmitted.
–
Nodes within each blade enclosure exceed SECDED standards by detecting and
correcting 4-bit and 8-bit DRAM failures.
–
Detection of all double-component 4-bit DRAM failures occur within a pair of DIMMs.
–
32-bits of error checking code (ECC) are used on each 256 bits of data.
–
Automatic retry of uncorrected errors occurs to eliminate potential soft errors.
•
Power-on and boot:
–
Automatic testing (POST) occurs after you power on the system nodes.
–
Processors and memory are automatically de-allocated when a self-test failure occurs.
–
Boot times are minimized.
Summary of Contents for ICE X
Page 1: ...SGI ICE X System Hardware User Guide Document Number 007 5806 004 ...
Page 4: ......
Page 10: ......
Page 14: ......
Page 27: ...Powering the System On and Off 007 5806 004 7 Figure 1 5 Three Phase PDU Examples ...
Page 36: ......
Page 78: ...58 007 5806 004 4 Rack Information Figure 4 2 Front Lock on Tall 42U D Rack ...
Page 80: ...60 007 5806 004 4 Rack Information Figure 4 4 Air Cooled D Rack Rear Door and Lock Example ...
Page 84: ...64 007 5806 004 4 Rack Information Figure 4 6 SGI ICE X Multi Cell M Cell Rack Array Example ...
Page 86: ......
