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DRAM Timing
This item lets you set Dram timing automatically if you select "By
SPD". SPD (Serial Presence Detect) is an EEPRON chip on DIMM
module that stores information about memory chips which contains
size, speed, voltage, row and column addressed, and manufacturer.
If you choose "Manual" following three items are available.
Ø
The Choice: Manual or By SPD.
SDRAM CAS Latency
This item enables you to select CAS latency time in HCLKs of 2/2 or
3/3. It's set at factory and depends on the DRAM installed. Don't
change the value unless you change specifications of the CPU or
DRAM installed.
Ø
The Choice: 3 or 2
Bank Interleave
The interleave number of internal banks, can be set to 2 way, 4 way
interleave or disabled. For VCM and 16Mb type dram chips, the bank
interleave is fixed at 2 way interleave.
When the dram timing is selected by SPD, it will be set by the value on
SPD of the RAM module(SDR).
Ø
The Choice: Disabled, 2 Bank, or 4 Bank.
Precharge to Active (Trp)
This item allows you to Precharge Command to Active Command
Period.
Ø
The Choice: 2T or 3T.
Active to Precharge (Tras)
This item allows you to Active Command to Precharge Command
Period.
Ø
The Choice: 5T or 6T.
Active to CMD (Trcd)
This item allows you to Active to CMD.
Ø
The Choice: 2T or 3T.
DRAM Burst Len
This item allows you to select Dram Burst Length.
Ø
The Choice: 4 or 8.
