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AGP Driving Value
This item defines the AGP output buffer drive strength.
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Key in a HEX number: Min=0000, Max=00FF.
AGP Fast Write
This item enables or disables the fast written function for the AGP card.
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The Choice: Disabled or Enabled.
AGP Master 1 WS Write
When Enabled, writing to the AGP is implemented with a single delay.
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The Choice: Disabled or Enabled.
AGP Master 1 WS Read
When Enabled, reading to the AGP is implemented with a single delay.
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The Choice: Disabled or Enabled.
CPU & PCI Bus Control
Press <Enter> to enter into the detailed options.
PCI1/PCI2 Master 0 WS Write
When Enabled, writing to the PCI bus is implemented with no delay.
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The Choice: Enabled or Disabled.
PCI1/PCI2 Post Write
When Enabled, writing from the CPU to the PCI bus is buffered, to
compensate for the speed differences between them.
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The Choice: Enabled or Disabled.
PCI Delay Transaction
The chipset has an embedded 32-bit post written buffer to support
delay transactions cycles. Select Enabled to support compliance with
PCI specification version 2.1.
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The Choice: Enabled or Disabled.
System BIOS Cacheable
The items allow the system to be cached in memory for faster execu-
tion. Leave the items at the default value for better performance.
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The choice: Disabled or Enabled.
Video RAM Cacheable
The items allow the video to be cached in memory for faster execution.
Leave the items at the default value for better performance.
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The choice: Disabled or Enabled.
VGA Share Memory Size
The item specifies the shared memory size for VGA usage.
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The Choice: 8M, 16M, or 32M.
