Shivaki STV-24LEDGR7, Service Manual

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K4T51163QI
datasheet
DDR2 SDRAM
Rev. 1.0
K4T51083QI
K4T51043QI
[ Table 5 ] Derating values for DDR2-667, DDR2-800, DDR2-1066
For all input signals the total tIS (setup time) and tIH (hold time) required is calculated by adding the data sheet tIS(base) and tIH(base) value to the
Δ
tIS
and
Δ
tIH derating value respectively. Example: tIS (total setup time) = tIS(base) +
Δ
tIS
Setup (tIS) nominal slew rate for a rising signal is defined as the slew rate between the last crossing of V
REF
(DC) and the first crossing of V
IH
(AC)min.
Setup (tIS) nominal slew rate for a falling signal is defined as the slew rate between the last crossing of V
REF
(DC) and the first crossing of V
IL
(AC)max. If
the actual signal is always earlier than the nominal slew rate line between shaded ’V
REF
(DC) to ac region’, use nominal slew rate for derating value (see
Figure 15). If the actual signal is later than the nominal slew rate line anywhere between shaded ’V
REF
(DC) to ac region’, the slew rate of a tangent line to
the actual signal from the ac level to dc level is used for derating value (see Figure 16).
Hold (tIH) nominal slew rate for a rising signal is defined as the slew rate between the last crossing of V
IL
(DC)max and the first crossing of V
REF
(DC).
Hold (tIH) nominal slew rate for a falling signal is defined as the slew rate between the last crossing of V
IH
(DC)min and the first crossing of V
REF
(DC). If
the actual signal is always later than the nominal slewrate line between shaded ’dc to V
REF
(DC) region’, use nominal slew rate for derating value (see Fig-
ure 17). If the actual signal is earlier than the nominal slew rate line anywhere between shaded ’dc to V
REF
(DC) region’, the slew rate of a tangent line to
the actual signal from the dc level to V
REF
(DC) level is used for derating value (see Figure 18).
Although for slow slew rates the total setup time might be negative (i.e. a valid input signal will not have reached V
IH/IL
(AC) at the time of the rising clock
transition) a valid input signal is still required to complete the transition and reach V
IH/IL
(AC).
For slew rates in between the values listed in Table 4 and Table 5 the derating values may obtained by linear interpolation.
These values are typically not subject to production test. They are verified by design and characterization.
Δ
tIS and
Δ
tIH Derating Values for DDR2-667, DDR2-800, DDR2-1066
CK, CK Differential Slew Rate
2.0 V/ns 1.5 V/ns 1.0 V/ns
Units NOTE
Δ
tIS
Δ
tIH
Δ
tIS
Δ
tIH
Δ
tIS
Δ
tIH
Command/
Address Slew
rate(V/ns)
4.0 +150 +94 +180 +124 +210 +154 ps 1
3.5 +143 +89 +173 +119 +203 +149 ps 1
3.0 +133 +83 +163 +113 +193 +143 ps 1
2.5 +120 +75 +150 +105 +180 +135 ps 1
2.0 +100 +45 +130 +75 +160 +105 ps 1
1.5 +67 +21 +97 +51 +127 +81 ps 1
1.0 0 0 +30 +30 +60 +60 ps 1
0.9 -5 -14 +25 +16 +55 +46 ps 1
0.8 -13 -31 +17 -1 +47 +29 ps 1
0.7 -22 -54 +8 -24 +38 +6 ps 1
0.6 -34 -83 -4 -53 +26 -23 ps 1
0.5 -60 -125 -30 -95 0 -65 ps 1
0.4 -100 -188 -70 -158 -40 -128 ps 1
0.3 -168 -292 -138 -262 -108 -232 ps 1
0.25 -200 -375 -170 -345 -140 -315 ps 1
0.2 -325 -500 -295 -470 -265 -440 ps 1
0.15 -517 -708 -487 -678 -457 -648 ps 1
0.1 -1000 -1125 -970 -1095 -940 -1065 ps 1
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