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VCC to GND .................................................................. (0.3V, +3.6V
RFIN, , IFVGAIN(,
, IFOUT1(, IFOUT2, ............................... (0.3V, Vcc+0.3V
SDA, SCLK, IFAGC, RFVGA ....................................... (0.3V, +3.6V
IFOUT1, IFOUT Short Circuit Protection............................. Indefinite
RF Input Power ..................................................................... +10 dBm
Operating Temperature .........................................0°C to +70
°
C
Junction Temperature ................................................... +150°C
Storage Temperature.................................................. (65°C to +165°C
Lead Temperature (soldering 10 sec.)...................................... +300°C
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(Typical Operating Circuit as shown, VCC= 3.1 to 3.5 V, TA = 0°C to +70°C Registers set according to Table 1 (Register Summary Table),
TYP values are at Vcc = 3.3V, TA =25°C, Note 0, unless otherwise noted.)
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1
Supply Voltage
3.1
3.5
V
IF VGA Enabled
225
270
mA
2
Supply Current
Standby (REF Oscillator ON)
5
mA
3
RF and IF VGC Input Bias
Current
At 0.5V to 3.0V DC
(100 to
+100
uA
4
RF and IF VGC Control
Voltage
Maximum Gain
3.0
V
5
RF and IF VGC Control
Voltage
Minimum Gain
0.5
V
,
6
Input Logic Level Low
0.3xVcc
V
TEST
7
Input Logic Level High
0.7xVcc
V
TEST
10
Output Logic Level Low
3 mA sink current
0.4
V
TEST
11
Output Logic Level High
Vcc(0.5
V
TEST
12
Maximum Clock Rate
400
kHz
TEST
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(Typical Operating Circuit as shown, RF Center Frequency = 666MHz, IF Center Frequency = 36.15MHz, Registers set according to Table 1,
Fref=16 MHz, RFVGC = IFVGC = VCC= 3.3V, T
A
= 25º, unless otherwise noted.).
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21a
RFINL Operating
Frequency Range
Noise Figure specification is met over this
frequency range
47
345
MHz
21b
RFINH Operating
Frequency Range
Noise Figure specification is met over this
frequency range
345
862
MHz
24
Maximum Voltage Gain to
IFOUT1, IFOUT2
DTV differential mode, single(ended mode,
or ATV single(ended mode, 666 MHz
43
dB
27
RF Gain Control Range
RFVCG 0.5 to 3.0V
>40
dB
29
Noise Figure
75 , in(channel, worst(case channel
<5
dB
35
47 ~
470MHz
>65
dBc
36
Image Rejection
Image video carrier applied at
2*IF above desired channel’s
center frequency
470 ~ 860
MHz
>60
dBc
0 +'
54
Maximum Voltage Gain
Output Load = 2 k || 3 pF, differential. load
>55
dB
55
Minimum Voltage Gain
IFVGC = 0.5V
<25
dB
60
In(Channel Output V1dB
>2.5
Vpp
Page 111 of 152
Summary of Contents for STV-24LEDGR7
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Page 26: ...BLOCK DIAGRAM DVD System Block Diagram Page 10 of 152 ...
Page 35: ...MAIN IC SPECIFICATIONS Page 19 of 152 ...
Page 36: ...Page 20 of 152 ...
Page 37: ...Page 21 of 152 ...
Page 38: ...Page 22 of 152 ...
Page 39: ...Page 23 of 152 ...
Page 40: ...Page 24 of 152 ...
Page 41: ...Page 25 of 152 ...
Page 42: ...Page 26 of 152 ...
Page 148: ...PCB INFORMATION PCB of main board 1 Page 132 of 152 ...
Page 149: ...PCB of main board 2 Page 133 of 152 ...
Page 150: ...PCB of main board 3 Page 134 of 152 ...
Page 151: ...PCB of main board 4 Page 135 of 152 ...
Page 152: ...PCB of main board 5 Page 136 of 152 ...
Page 153: ...PCB of main board 6 Page 137 of 152 ...
Page 154: ...PCB of DVD 1 Page 138 of 152 ...
Page 155: ...PCB of DVD 2 Page 139 of 152 ...
Page 156: ...PCB of DVD 3 Page 140 of 152 ...
Page 157: ...PCB of DVD 4 Page 141 of 152 ...
Page 158: ...PCB of DVD 5 Page 142 of 152 ...
Page 159: ...PCB of DVD 6 Page 143 of 152 ...