HT-DV40H
8 – 23
A_IEC_TX/GPIO
195
Input/Output
IEC-958 transmit data
A_DATA[0] /
GPIO
196
Input/Output
Serial audio data output for channel 1/0 or GPIO
A_DATA[1] /
GPIO
198
Input/Output
Serial audio data output for channel 3/2 or GPIO
A_DATA[2] /
GPIO
199
Input/Output
Serial audio data output for channel 5/4 or GPIO
A_DATA[3] /
GPIO
200
Input/Output
Serial audio data output for channel 7/6 or GPIO
A_LRCK/GPIO
201
Input/Output
PCM data output L/R strobe
A_BCK/GPIO
203
Input/Output
PCM bit clock
A_XCK/GPIO
204
Input/Output
Audio over-sampling clock
UA0_RX/GPIO
205
Input/Output
Audio over-sampling clock
Symbol
Pin #
Input/Output
Description
Priority selection
Function
Dir
gpio_first[3][4] = 1
GPIO[52]
Input/Output
sft_cfg3[8] = 1'b1
IEC_TX (default)
Output
(other)
GPIO[52]
Input/Output
Priority selection
Function
Dir
gpio_first[3][5] = 1
GPIO[53]
Input/Output
sft_cfg3[1] = 1'b1
AU_DATA[0] (default)
Output
(other)
GPIO[53]
Input/Output
Priority selection
Function
Dir
gpio_first[3][6] = 1
GPIO[54]
Input/Output
sft_cfg3[2] = 1'b1
AU_DATA[1] (default)
Output
(other)
GPIO[54]
Input/Output
Priority selection
Function
Dir
gpio_first[3][7] = 1
GPIO[55]
Input/Output
sft_cfg13[8:4] = 5'b10010
ADC_DATA
Output
sft_cfg3[3] = 1'b1
AU_DATA[2] (default)
Output
(other)
GPIO[55]
Input/Output
Priority selection
Function
Dir
gpio_first[3][8] = 1
GPIO[56]
Input/Output
sft_cfg13[3:0] = 4'b0010
IEC_RX
Input
sft_cfg13[8:4] = 5'b10011
ADC_DATA
Input
sft_cfg3[4] = 1'b1
AU_DATA[3] (default)
Output
(other)
GPIO[56]
Input/Output
Priority selection
Function
Dir
gpio_first[3][9] = 1
GPIO[57]
Input/Output
sft_cfg3[6] = 1'b1
AU_LRCK (default)
Input/Output
(other)
GPIO[57]
Input/Output
Priority selection
Function
Dir
gpio_first[3][10] = 1
GPIO[58]
Input/Output
sft_cfg3[0] = 1'b1
AU_BCK (default)
Input/Output
(other)
GPIO[58]
Input/Output
Priority selection
Function
Dir
gpio_first[3][11] = 1
GPIO[59]
Input/Output
sft_cfg3[9] = 1'b1
DAC_XCK (default)
Input/Output
(other)
GPIO[59]
Input/Output
Priority selection
Function
Dir
gpio_first[3][12] = 1
GPIO[60]
Input/Output
sft_cfg2[3:2] = 1
UA0_RXD (default)
Input
sft_cfg3[13:12] = 1
TV_HSYNC
Input/Output
sft_cfg14[10:8] = 3'b011
TV_HSYNC_SRGB
Output
sft_cfg4[15:13] = 3'b011
TV_HSYNC_PC
Output
(other)
GPIO[60]
Input/Output
Summary of Contents for HT-DV40H
Page 13: ...HT DV40H 2 6 MEMO ...
Page 15: ...HT DV40H 4 2 IC701 IXA161AW00 PR PB Y S01 Figure 4 2 MAIN BLOCK DIAGRAM 2 2 ...
Page 19: ...HT DV40H 4 6 Figure 4 6 POWER BLOCK DIAGRAM 2 2 ...
Page 30: ...HT DV40H 5 11 MEMO ...
Page 34: ...HT DV40H 6 4 Figure 6 3 MAIN SCHEMATIC DIAGRAM 3 8 TO SUBWOOFER PWB D BI402 13 14 15 16 17 18 ...
Page 35: ...HT DV40H 6 5 Figure 6 4 MAIN SCHEMATIC DIAGRAM 4 8 MIC_IN A B C D E F G H 1 2 3 4 5 6 ...
Page 36: ...HT DV40H 6 6 Figure 6 5 MAIN SCHEMATIC DIAGRAM 5 8 AZ4558CME JP826 7 8 9 10 11 12 ...
Page 38: ...HT DV40H 6 8 Figure 6 7 MAIN SCHEMATIC DIAGRAM 7 8 AUDIO SIGNAL A B C D E F G H 1 2 3 4 5 6 ...
Page 39: ...HT DV40H 6 9 Figure 6 8 MAIN SCHEMATIC DIAGRAM 8 8 SPEAKER TERMINAL 7 8 9 10 11 12 ...
Page 40: ...HT DV40H 6 10 Figure 6 9 USB SCHEMATIC DIAGRAM BI706 A B C D E F G H 1 2 3 4 5 6 ...
Page 41: ...HT DV40H 6 11 MEMO ...
Page 45: ...HT DV40H 6 15 Figure 6 13 DISPLAY SCHEMATIC DIAGRAM 2 2 7 8 9 10 11 12 ...
Page 47: ...HT DV40H 6 17 MEMO ...
Page 49: ...HT DV40H 6 19 Figure 6 16 DVD SCHEMATIC DIAGRAM 2 8 7 8 9 10 11 12 ...
Page 52: ...HT DV40H 6 22 Figure 6 19 DVD SCHEMATIC DIAGRAM 5 8 7 8 9 10 11 12 ...
Page 54: ...HT DV40H 6 24 Figure 6 21 DVD SCHEMATIC DIAGRAM 7 8 CD SIGNAL A B C D E F G H 1 2 3 4 5 6 ...
Page 67: ...HT DV40H 6 37 Figure 6 34 WIRING SIDE OF POWER PWB BOTTOM VIEW 2 2 7 8 9 10 11 12 ...
Page 71: ...HT DV40H 6 41 Figure 6 38 WIRING SIDE OF DISPLAY PWB BOTTOM VIEW 2 2 7 8 9 10 11 12 ...
