GX20
6 – 9
CONFIDENTIAL
IC106 (LRS1B24): 4-LEVEL STACK MEMORY
Pin No.
Terminal name
Input/Output
Description of terminal
1
NC–
Not used
2
NC–
Not used
3
A20
Input
Address input (Flash, Smartcombo RAM)
4
A11
Input
Address input (common)
5
A15
Input
Address input (common)
6
A14
Input
Address input (common)
7
A13
Input
Address input (common)
8
A12
Input
Address input (common)
9
GND
–
Ground
10*
NC–
Not used
11
NC–
Not used
12
NC–
Not used
13
A16
Input
Address input (common)
14
A8
Input
Address input (common)
15
A10
Input
Address input (common)
16
A9
Input
Address input (common)
17
DQ15
Input/Output
Data input/output (common)
18
S-/WE
Input
Write enable input (SRAM, Smartcombo RAM)
19
DQ14
Input/Output
Data input/output (common)
20
DQ7
Input/Output
Data input/output (common)
21
F-/WE
Input
Write enable input (Flash)
22
RY/-BY
Output
Ready busy output (Flash)
When deleting/writing: VOL
When interrupting block delete/write: High-Z (High impedance)
23
A21
Input
Address input (Flash, Smartcombo RAM)
24
S-A17
Input
Address input (SRAM, Smartcombo RAM)
25
DQ13
Input/Output
Data input/output (common)
26
DQ6
Input/Output
Data input/output (common)
27
DQ4
Input/Output
Data input/output (common)
28
DQ5
Input/Output
Data input/output (common)
29
GND
–
Ground
30
/RST
Input
Reset power down input (Flash)
When deleting/writing block: VIH
When reading: VIH
Reset power down: VIL
31
T1
–
Test pin (all open)
32*
T2 (NC)
–
Test pin (all open)
33
DQ12
Input/Output
Data input/output (common)
34
CE2
Input
Chip enable input (SRAM), sleep state input (Smartcombo RAM)
35
S-VCC
–
Power (SRAM)
36
F/SC-VCC
–
Power (Flash, Smartcombo RAM)
37
/WP (F-/WP)
Input
Write protect input (Flash)
When WP is set to VIL, it is prohibited to cancel lock bit of the block that has lock bit down set.
Deletion and program operation are executable for the block that has neither lock bit nor lock
down bit set. Disable lock down bit by setting WP to VIH.
38
VPP (F-VPP)
Input/–
Power voltage detect terminal (Flash)
When deleting/writing: VPP = VPPH
When deleting/writing is prohibited: VPP < VPPLK
39
A19 (F-A19)
Input
Address input (Flash, Smartcombo RAM)
40
DQ11
Input/Output
Data input/output (common)
41
F/SC-VCC
–
Power (Flash, Smartcombo RAM)
42
DQ10
Input/Output
Data input/output (common)
43
DQ2
Input/Output
Data input/output (common)
44
DQ3
Input/Output
Data input/output (common)
45
/LB
Input
SRAM, Smartcombo RAM byte enable input (DQ0 – DQ7)
46
/UB
Input
SRAM, Smartcombo RAM byte enable input (DQ8 – DQ15)
47
S-/OE
Input
Output enable input (SRAM, Smartcombo RAM)
48*
T3(NC)
–
Test pin (all open)
49
DQ9
Input/Output
Data input/output (common)
50
DQ8
Input/Output
Data input/output (common)
51
DQ0
Input/Output
Data input/output (common)
52
DQ1
Input/Output
Data input/output (common)
53
A18
Input
Address input (Flash, Smartcombo RAM)
54
F-A17
Input
Address input (Flash)
