ENGLISH
Pag. 40
2.4
Layout main board
Figure 5) Layout main board
WARNING: THE SECOND SERIAL LINE IS OPTIONAL
U U22
M MCC
F F5522
8 822CC
V VFF66
6 6
2 25566
MM
A APPBB
G GAA
1
Relay
1
SD2
SD3
8
CPU
8 analogue 4-20 mA
inputs
S: 4-20 mA
signal
V+: V+ of detector power supply V- : V
- of detector power supply
Serial line 1
Dip switch language setting
Dip switch general settings
SD card slot
Auxiliary power supply outputs
24Vdc (3A)
Digital inputs (not used)
Serial line 2
NO
COM
NC
B A
B A
F1: 2A
T fuse on power supply
F2: 3.15A
T fuse on auxiliary outputs
V- S
S
S
S
V+
4
3
2
1
V- S
S
S
S
V+
8
7
6
5
Relay
2
Relay
3
Relay
4
Relay
5
Relay
6
Relay
7
Relay
8
NO
COM
NC
NO
COM
NC
NO
COM
NC
NO
COM
NC
NO
COM
NC
NO
COM
NC
NO
COM
NC
F2
F1
+ -
Power supply
Control signals from power supply
+ -
PC serial port
JP43
JP43
Chiuso: abilita le schede ausiliarie
(STG/TCPIP-C e STG/32-85)
1
4
ON
OFF
ON
OFF
1
2
7
6
5
VI+
VI-
VO-
VO+
NC
1
2
7
6
5
VI+
VI-
VO-
VO+
NC
Serial line 1
board
Serial line 2
board
Shield
Shield
8 7 6 5
4 3 2 1
Summary of Contents for MULTISCAN++/S1-32
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