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Seco Qseven Q7-974, User Manual

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Seco Qseven Q7-974 User Manual Download Page 21

 

 

Q7-974

 

Q7-974 User Manual - Rev. First Edition: 0.1 - Last Edition: 2.3 - Author: S.B. - Reviewed by G.G. Copyright © 2017 SECO S.r.l.  

21 

3.1

 

Introduction 

According to Qseven

®

 specifications, all interfaces to the board are available through a single card edge connector. In addition, a CRT FFC/FPC connector card 

slot  is  present  on  the  left  side  of  the  board  to  take  advantage  of  the  Intel

®

  Atom   E38xx  family  of  SOCs

’

  native  CRT  interface.  Moreover,  an  additional  Fan 

connector has been placed on the right side of the board, in order to allow an easier connection of active heatsinks to the module

 

 

 

TOP SIDE 

Card edge golden 

finger, pin 228 

Ext. FAN 

Connector 

Card edge golden 

finger, pin 2 

Card edge golden 

finger, pin 1 

Card edge golden 

finger, pin 229 

VGA 

connector 

BOTTOM SIDE 

Summary of Contents for Qseven Q7-974

Page 1: ...Q7 974 Qseven Rel 2 0 Compliant Module with the Intel Bay Trail family System On Chips...

Page 2: ...e mentioned documents are copyright 2008 Insyde Software Corp All rights reserved For further information on this module or other SECO products but also to get the required assistance for any and poss...

Page 3: ...pecifications 11 OVERVIEW 13 Chapter 2 2 1 Introduction 14 2 2 Technical Specifications 15 2 3 Electrical Specifications 16 2 3 1 Power Rails meanings 16 2 3 2 Power Consumption 17 2 4 Mechanical Spec...

Page 4: ...bmenu 57 4 3 10 SATA configuration submenu 57 4 3 11 Console Redirection submenu 58 4 3 12 ACPI Table features submenu 59 4 3 13 SuperI O configuration submenu 60 4 3 14 Virtual SuperI O configuration...

Page 5: ...0 1 Last Edition 2 3 Author S B Reviewed by G G Copyright 2017 SECO S r l 5 Chapter 1 Warranty Information and assistance RMA number request Safety Electrostatic Discharges RoHS compliance Terminolog...

Page 6: ...A authorisation number must be put both on the packaging and on the documents shipped with the items which must include all the accessories in their original packaging with no signs of damage to or ta...

Page 7: ...re it is possible to send the faulty product to the SECO Repair Centre In this case follow this procedure o Returned items must be accompanied by a RMA Number Items sent without the RMA number will be...

Page 8: ...high voltages caused by static electricity could damage some or all the devices and or components on board 1 6 RoHS compliance The Q7 974 module is designed using RoHS compliant components and is man...

Page 9: ...Display Port a type of digital video display interface DVI Digital Visual interface a type of digital video display interface eDP embedded Display Port a type of digital video display interface devel...

Page 10: ...data storage devices and or the installed OS SATA Serial Advance Technology Attachment a differential half duplex serial interface for Hard Disks SD Secure Digital a memory card type SDHC Secure Digi...

Page 11: ...l Front Panel I O connectivity DG http www formfactors org developer specs A2928604 005 pdf JTAG http standards ieee org develop wg Boundary_Scan_Architecture html LPC Bus http www intel com design ch...

Page 12: ...iation https www sdcard org home SM Bus http www smbus org specs TMDS http www siliconimage com technologies tmds UEFI http www uefi org USB 2 0 and USB OTG http www usb org developers docs usb_20_070...

Page 13: ...r Manual Rev First Edition 0 1 Last Edition 2 3 Author S B Reviewed by G G Copyright 2017 SECO S r l 13 Chapter 2 Introduction Technical Specifications Electrical Specifications Mechanical Specificati...

Page 14: ...2 0 and HW acceleration for video decoding of H 264 MPEG2 MVG VC 1 VP8 and MJPEG video standards for H 264 MPEG2 and MVG also HW encoding is offered This embedded GPU is able to drive two independent...

Page 15: ...18 24 bit dual channel LVDS interface Additional VGA interface optional external adapter is required Video Resolutions HDMI Up to 1920x1080p 60Hz Display Port eDP CRT Up to 2560x1600 60Hz Optional LV...

Page 16: ...ed directly through card edge fingers see connector s pinout All remaining voltages needed for board s working are generated internally from 5V_S power rail 2 3 1 Power Rails meanings In all the table...

Page 17: ...measured on carrier board s backup battery when the system is not powered The current consumptions written in the table of this page have been measured using the following setups Intel Atom E3845 SoC...

Page 18: ...rious connector heights for different carrier board applications needs Qseven specification suggests two connector heights 7 8mm and 7 5mm but it is also possible to use different connector heights al...

Page 19: ...e interface STMicroelectronics STM32F100R4 microcontroller Embedded SATA Disk Internal FAN connector VGA connector Intel Bay Trail family SoC Intel Ethernet Controller I210 IT DDR3L System Memory DDR...

Page 20: ...Q7 974 Q7 974 User Manual Rev First Edition 0 1 Last Edition 2 3 Author S B Reviewed by G G Copyright 2017 SECO S r l 20 Chapter 3 Introduction Connectors description...

Page 21: ...PC connector card slot is present on the left side of the board to take advantage of the Intel Atom E38xx family of SOCs native CRT interface Moreover an additional Fan connector has been placed on th...

Page 22: ...x SoC internal DAC s Green Signal video output A 150 pull down resistor is placed on the line CRT_BLUE Intel Atom E38xx SoC internal DAC s Blue Signal video output A 150 pull down resistor is placed o...

Page 23: ...ll up resistor 3 2 3 Qseven Connector According to Qseven specifications all interface signals are reported on the card edge connector which is a 230 pin Card Edge that can be inserted into standard 2...

Page 24: ...SATA SATA O SATA_ACT 33 34 GND PWR SATA I SATA0_RX 35 36 SATA1_RX O SATA SATA I SATA0_RX 37 38 SATA1_RX O SATA PWR GND 39 40 GND PWR N A N C 41 42 SDIO_CLK O SDIO SDIO I SDIO_CD 43 44 N C N A SDIO I...

Page 25: ...DS_A0 eDP0_TX0 99 100 LVDS_B0 O LVDS LVDS eDP O LVDS_A0 eDP0_TX0 101 102 LVDS_B0 O LVDS LVDS eDP O LVDS_A1 eDP0_TX1 103 104 LVDS_B1 O LVDS LVDS eDP O LVDS_A1 eDP0_TX1 105 106 LVDS_B1 O LVDS LVDS eDP O...

Page 26: ...DMI HDMI DP I HDMI_HPD 153 154 DP_HPD I DP PCI E O PCIE_CLK_REF 155 156 PCIE_WAKE I PCI E PCI E O PCIE_CLK_REF 157 158 PCIE_RST O PCI E PWR GND 159 160 GND PWR N A N C 161 162 N C N A N A N C 163 164...

Page 27: ...0 SPI_CS0 O SPI SPI I SPI_MISO 201 202 N C N A SPI O SPI_CLK 203 204 MFG_NC4 N A MFG PWR 5V_A 205 206 5V_A PWR MFG N A MFG_NC0 207 208 MFG_NC2 N A MFG MFG N A MFG_NC1 209 210 MFG_NC3 N A MFG PWR 5V_S...

Page 28: ...PCIE_CLK_REF PCI Express Reference Clock Differential Pair Please consider that only one reference clock is supplied while there are three different PCI express lanes When more than one PCI Express l...

Page 29: ...232 transceiver for the Carrier board U1 SP3232ECY C1 1 C1 3 C2 4 C2 5 V 2 V 6 T1IN 11 T2IN 10 R1OUT 12 R2OUT 9 T1OUT 14 T2OUT 7 R1IN 13 R2IN 8 VCC 16 GND 15 P1 DB9 CONNECTOR 5 9 4 8 3 7 2 6 1 10 11 C...

Page 30: ...V_A GBE_LINK100 Ethernet controller 100Mbps link indicator Active Low Output signal electrical level 3 3V_A GBE_LINK1000 Ethernet controller 1Gbps link indicator Active Low Output signal electrical le...

Page 31: ...ates Here following the signals related to SATA interface SATA0_TX SATA0_TX Serial ATA Channel 0 Transmit differential pair SATA0_RX SATA0_RX Serial ATA Channel 0 Receive differential pair SATA1_TX SA...

Page 32: ...fferential pair coming out from SMSC USB3503 HSIC USB Hub Downstream port 3 USB_SSRX0 USB_SSRX0 USB Super Speed Port 0 receive differential pair it is managed by xHCI controller USB_SSTX0 USB_SSTX0 US...

Page 33: ...7 8 G1 G2 9 R1 R 10K L1 BLM18PG121SN1 L5 BLM18PG121SN1 CN1 Dual_USB connector 1 2 3 4 5 6 7 8 G1 G2 G3 G4 L14 DLW21HN900SQ2 C16 CC 100nF L12 DLW21HN900SQ2 C2 CC 10uF 10V C5 CC 100nF R3 R 0 U4 TPS2552D...

Page 34: ...t switch of the external SD card Since microSD cards don t manage this signal it is important that when designing carrier boards with microSD slots this signal must be tied to GND otherwise the OS wil...

Page 35: ...tial clock LVDS_B0 LVDS_B0 LVDS Secondary Channel 0 differential data pair 0 LVDS_B1 LVDS_B1 LVDS Secondary Channel 0 differential data pair 1 LVDS_B2 LVDS_B2 LVDS Secondary Channel 0 differential dat...

Page 36: ...re following the signals related to eDP management eDP0_TX0 eDP0_TX0 eDP channel differential data pair 0 eDP0_TX1 eDP0_TX1 eDP channel differential data pair 1 eDP0_TX2 eDP0_TX 2 eDP channel differen...

Page 37: ...General Purpose 1_wire bus interface that can be used for implementation of HDMI_CEC Real usage of this signal depends on Q7 974 dedicated API libraries HDMI_HPD Hot Plug Detect Input signal 3 3V_S el...

Page 38: ...Q1 2N7002 D2 IP4283CZ10 TBA 1 3 2 5 4 8 10 9 7 6 HDMI_CTRL_CLK HDMI_CTRL_DAT U1 SN74LVC1G14DBVR 2 3 4 5 L1 BLM18PG121SN1 TYPE A GND CN1 WHDM 19D5L1BF3U4W 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18...

Page 39: ...lay Port interface DP_HPD DisplayPort Hot Plug Detect Input signal 3 3V_S electrical level signal active low with 100k pull up resistor This signal was present on Qseven specifications until rev 1 2 w...

Page 40: ...D 15 OE3 10 3A 9 3B 8 4A 12 OE4 13 4B 11 R6 R 100K C2 CC 100nF C3 CC 100nF R4 R 100K 3 3V_S 3 3V_S CAD R11 R 0 X R9 R 0 X DP_HPD R12 R 0 X CAD CAD DP_AUX DP_AUX HDMI_CTRL_CLK HDMI_CTRL_DAT 3 3V_A R1 R...

Page 41: ...nterrupt support 3 2 3 13 SPI interface signals The Intel Atom E38xx family of SOCs offer also one dedicated controller for Serial Peripheral Interface SPI which can be used for connection of EEPROMs...

Page 42: ...nput active low 3 3V_A electrical voltage signal with 10k pull up resistor and series Schottky diode This signal can be driven low on the carrier board to report that a Wake up event has occurred and...

Page 43: ...Fast mode Plus bitrate up to 1Mbps High speed mode bitrate up to 3 4Mbps GP0_I2C_DAT general purpose I2C Bus data line Bidirectional signal electrical level 3 3V_S with a 560 pull up resistor It is ma...

Page 44: ...sistors that are necessary to configure the board properly The customer must avoid to place on the carrier board pull up or pull down resistors on signals that are used as strap signal since it could...

Page 45: ...ser Manual Rev First Edition 0 1 Last Edition 2 3 Author S B Reviewed by G G Copyright 2017 SECO S r l 45 Chapter 4 InsydeH2O setup Utility Main setup menu Advanced menu Security menu Power menu Boot...

Page 46: ...Advanced Security Power Boot Select a setup item or a submenu F5 F6 F5 and F6 keys allows to change the field value of highlighted menu item F1 The F1 key allows displaying the General Help screen F9...

Page 47: ...us Speed and memory configuration Only two options can be configured 4 2 1 System Time System Date Use this option to change the system time and date Highlight System Time or System Date using the Arr...

Page 48: ...guration See submenu Enable Disable Misc features Security configuration TXE See submenu Trusted Execution Environment Security Configurations Video Configuration See submenu Configures the options fo...

Page 49: ...t Port 2 PCI Express Root Port 3 internal LAN Disabled Enabled Enable or Disable single PCI Express Root Port x PCI Express Root Ports 0 2 are those routed to Qseven card edge connector PCI Express Ro...

Page 50: ...g on the last used configuration Best Auto always route to xHCI Win7 Uninstall xHCI driver workaround Disabled Enabled Enable Disable Windows 7 Uninstall xHCI driver workaround When enabled Windows 7...

Page 51: ...Device s Name Disabled Enabled Available only when USB Ignore request Timeout Sec is Set Allows enabling disabling the disabling of USB Device s name in the timeout string Menu Item Options Descriptio...

Page 52: ...7 use ACPI mode for Android and Windows 8 LPSS SCC Auto Switch Enable Disable Available only when LPSS SCC Devices Mode is set to ACPI Mode Auto switches LPSS and SCC devices from ACPI mode to PCI mo...

Page 53: ...Dynamic Clock Gating Enabled Disabled Enable or Disable PCI Express Dynamic Clock Gating Force Legacy Free Enable Disable When enabled this item will force the Legacy Free mode it will disable the KB...

Page 54: ...P Custom parameters See submenu Only available when LFP is set to Custom Select Detailed Timing Descriptor Parameters LFP Color Mode VESA 24bpp JEIDA 24bpp 18 bpp Select the color depth of LVDS interf...

Page 55: ...y features which allows the onboard graphics entering in standby mode to decrease power consumption PAVC Disabled LITE Mode SERPENT Mode Allows enabling the hardware acceleration of decoding of Protec...

Page 56: ...eet the LVDS display requirements Menu Item Options Description LVDS Spreading Depth No Spreading 0 5 1 0 1 5 2 0 2 5 Sets percentage of bandwidth of LVDS clock frequency for spreading spectrum LVDS O...

Page 57: ...SATA Configuration type With AHCI is not possible to install boot UEFI O S only Legacy OS can be installed a simpler driver is required Setting to IDE the controller is managed as a PCI device so add...

Page 58: ...to work even after Bios POST AutoRefresh Enabled Disabled When this feature is enabled the screen will auto refresh once after detecting the connection of a remote terminal FailSafeBaudRate This featu...

Page 59: ...e Redirection stop bits Flow Control None RTS CTS XON XOFF Set Console Redirection flow control type Menu Item Options Description FACP RTC S4 wakeup Enabled Disabled Enable or disable FACP Fixed ACPI...

Page 60: ...E8 0x3E0 0x2E0 0x338 0x238 0x220 0x228 Select the Base address for each Serial Port if enabled IRQ 3 4 5 6 7 10 11 14 15 Select the IRQ line to assign to each Serial Port if enabled Floppy Disk Contro...

Page 61: ...ess Disabled 0x3F8 0x2F8 0x3E8 0x2E8 0x3E0 0x2E0 0x338 0x238 0x220 0x228 Select the Base address for each virtual Serial Port or disable it IRQ Disabled 3 4 5 6 7 10 11 14 15 Select the IRQ line to as...

Page 62: ...nstall or Change the password for the users Length of password must be greater than one character USB Disks Signature Option See Submenu Allow to enable or disable USB boot from signed USB disks only...

Page 63: ...larity Inverted Polarity Configure LID_BTN Signal as always open or closed i e Force Open Force Closed no matter the pin level or configures the signal polarity Normal Polarity means the signal goes H...

Page 64: ...agement TM1 and TM2 Enabled Disabled Enable or Disable TM1 and TM2 Thermal management modes AESNI Feature Enabled Disabled Enable or Disable AESNI Advanced Encryption Standard New Instructions set of...

Page 65: ...item can be changed only when Watchdog is enabled Seconds of delay before the watchdog timer starts counting Timeout sec 20 600 This item can be changed only when Watchdog is enabled Watchdog Timeout...

Page 66: ...table will display the logo while booting Network Stack Enabled Disabled This submenu is available only when Boot Type is set to UEFI Boot type or Dual Boot type When enabled this option will make av...

Page 67: ...t On No Boot Device Found Enabled Disabled When this option is enabled the system will reset itself each time that doesn t find any valid boot device instead of waiting indefinitely that a Boot device...

Page 68: ...The list shown under this item will allows selecting the boot from different devices Use the and Keys to change the boot order priority Hard Disk Drive List of HD Drives found connected This voice wi...

Page 69: ...Save all changes made but doesn t exit from setup utility Exit Discarding Changes Exit system setup without saving any changes ESC key can be used for this operation Load Optimal Defaults Load Optima...

Page 70: ...Q7 974 Q7 974 User Manual Rev First Edition 0 1 Last Edition 2 3 Author S B Reviewed by G G Copyright 2017 SECO S r l 70 Chapter 5 Thermal Design Accessories...

Page 71: ...ke heatsinks fans heat pipes and so on Conversely heatsinks in some situation can represent the cooling solution Indeed when using Q7 974 module it is necessary to consider carefully the heat generate...

Page 72: ...Q7 974 Q7 974 User Manual Rev First Edition 0 1 Last Edition 2 3 Author S B Reviewed by G G Copyright 2017 SECO S r l 72 Standard Heatspreader dimensions...

Page 73: ...Q7 974 Q7 974 User Manual Rev First Edition 0 1 Last Edition 2 3 Author S B Reviewed by G G Copyright 2017 SECO S r l 73 Standard Heatsink dimensions...

Page 74: ...processors chipsets including Intel E38xx family of SOCs As previoulsy written in paragraph 3 2 1 however Qseven specifications Rel 2 0 define an area on the PCB that can be used to place optional I O...

Page 75: ...7 974 User Manual Rev First Edition 0 1 Last Edition 2 3 Author S B Reviewed by G G Copyright 2017 SECO S r l 75 SECO Srl Via Calamandrei 91 52100 Arezzo ITALY Ph 39 0575 26979 Fax 39 0575 350210 www...

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