QSEVEN-Q7ALx2 - Preliminary User Guide, Rev. 0.7
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System Resources
PCI Devices
7.1.
All devices follow the Peripheral Component Interconnect (PCI) 2.3 and PCI Express Base 1.0a specification. The BIOS
and Operating System (OS) control the memory and I/O resources. For more information, refer to the PCI 2.3
Specification.
I2C Bus
7.2.
The following table specifies the devices connected the I2C bus and includes the I2C address.
Table 12: I2C Bus Port Address
8-bit I2C Address
Used For
Available
Comment
A0h
JIDA-EEPROM
Yes
Module EEPROM
C0h
LVDS PTN3460
Yes
LVDS EEPROM
SM Bus
7.3.
The System Management (SM) Bus is an 8-bit address bus where the LSB (Bit 0) defines the direction (read/write).
Bit 0 = 0 defines the write address
Bit 0 = 1 defines the read address
The hexadecimal 8-bit addresses listed below show the write address for all devices. The hexadecimal 7-bit SMBus
addresses show the device address without bit0.
Table 13. SMBus Address
8-bit
Address
7-bit
Address
Device
Comment
SMBus
5Ch
2eh
HWM NCT7802Y
Do not use under any circumstances
SMB
A0h
50h
SPD DDR Channel 1
SMB