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QSEVEN-Q7ALx2 -  Preliminary User Guide, Rev. 0.7 

 

www.kontron.com 

 

// 30 

 

5.8.4.

 

Input Power Sequencing 

The following figure illustrates the Q7ALx2 module’s inputs power start and stop sequence requirements. 

Figure 11: Input Power Start and Stop Sequence 

 
 
VCC_RTC 

 

 
VCC_SB 

VCC 
 
 
 
PWGIN 

 

 

 

 

PWGIN is an active high input for the Qseven® module and indicate that the all the power 
rails on the carrier board are ready for use. 

 

Start sequence 

 

VCC_RTC must come up at the same time or before VCC_SB comes up (T1) 

 

VCC_SB must come up at the same time or before VCC comes up (T2) 

 

PWGIN must be active at the same time or after VCC comes up (T3) 

 

Stop Sequence 

 

PWGIN must be inactive at the same time or before VCC goes down (T4) 

 

VCC must go down at the same time or before VCC_SB goes down (T5) 

 

VCC_SB must go down at the same time or before VCC_RTC goes down (T6) 

 

5.8.5.

 

Power Management 

Power management options are available within the BIOS setup. The Q7ALx2 implements the Advanced Configuration 
and Power Interface (ACPI) ACPI 3.0 hardware specification to control typical features such as power button and 
suspend states.  

If power is removed, 5 VDC can be applied to VCC_SB pins (pins 205 and 206) to support the suspend-states: 

 

Suspend-to-Disk (S4) 

 

Soft-off state (S5) 

 

Implementing the wake-up event (S0) requires a connection to power, as the module will be started.  

Summary of Contents for kontron QSEVEN-Q7AL 2 Series

Page 1: ...USER GUIDE www kontron com 1 QSEVEN Q7ALx2 Doc Preliminary User Guide Rev 0 7 Doc ID 1067 2270...

Page 2: ...QSEVEN Q7ALx2 Preliminary User Guide Rev 0 7 www kontron com 2 This page has been intentionally left blank...

Page 3: ...lication will be suitable for the specified use without further testing or modification Kontron expressly informs the user that this user guide only contains a general description of processes and ins...

Page 4: ...entirely at your risk To minimize the risks associated with your products and applications you should provide adequate design and operating safeguards You are solely responsible for compliance with a...

Page 5: ...nditions Visit http www kontron com terms and conditions For contact information refer to the corporate offices contact information on the last page of this user guide or visit our website CONTACT US...

Page 6: ...or prescribed by the law may endanger your life health and or result in damage to your material ESD Sensitive Device This symbol and title inform that the electronic boards and their components are s...

Page 7: ...entral grounding point shall remain connected The earth ground cable shall be the last cable to be disconnected or the first cable to be connected when performing installation or removal procedures on...

Page 8: ...hip the product then re pack it in the same manner as it was delivered Special care is necessary when handling or unpacking the product See Special Handling and Unpacking Instruction Quality and Envir...

Page 9: ...3 Product Description 16 4 Scope of Delivery 17 Packing List 17 4 1 Accessories 17 4 2 5 Product Specification 18 Block Diagram 18 5 1 Module Views 19 5 2 Component Technical Data 21 5 3 Environmental...

Page 10: ...IOS 44 10 1 Setup Menus 45 10 2 10 2 1 Main Setup Menu 45 10 2 2 Advanced Setup Menu 47 10 2 3 Chipset Setup Menu 54 10 2 3 1 Chipset North Bridge 54 10 2 3 2 Chipset South Bridge 55 10 2 3 3 Chipset...

Page 11: ...up Menu Sub screens and Functions 70 Table 26 Save and Exit Setup Menu Sub screens and Functions 72 Table 27 List of Acronyms 76 List of Figures Figure 1 QSEVEN Module 16 Figure 2 Block Diagram Q7ALx2...

Page 12: ...cable only use the supplied power cable Do not use an extension cable to connect the product To guarantee sufficient airflow to cool the product ensure that Ventilation openings are not covered or bl...

Page 13: ...rds and therefore may not be connected to such devices Electrostatic Discharge ESD 1 1 A sudden discharge of electrostatic electricity can destroy static sensitive devices Proper packaging and groundi...

Page 14: ...eripheral device fulfills the fire protecting requirements of IEC 62368 1 Instructions for the Lithium Battery 1 4 The O7ALx2 module is supported via a lithium battery on a separate carrier board When...

Page 15: ...ardware and software This user guide focuses on describing the Q7ALx2 s special features and is not intended to be a standard PC textbook Before powering on the Q7ALx2 module Kontron recommends new us...

Page 16: ...n form factor 70 mm x 70 mm Qseven connector complies to Qseven specification Rev 2 1 Up to 8 GByte LPDDR4 memory down From 32 GByte SLC up to 64 GB MLC eMMC 5 1 Flash option 2x SATA 6 Gb s 4x PCIe x1...

Page 17: ...ed Part Part Description Q7ALx2 Qseven module board with Intel x86 SoC and on module memory Note The above packing list is for standard single box package only Accessories 4 2 The following accessorie...

Page 18: ...Q7ALx2 Preliminary User Guide Rev 0 7 www kontron com 18 5 Product Specification Block Diagram 5 1 The following figure displays the Q7ALx2 module s system block diagram Figure 2 Block Diagram Q7ALx2...

Page 19: ...v 0 7 www kontron com 19 Module Views 5 2 Figure 3 Top Side View Q7ALx2 1 SOC 2 Memory down 3 Qseven connector 4 CPLD connector 5 MIPI CSI2 Connector shown here as vacant slot option for some variants...

Page 20: ...QSEVEN Q7ALx2 Preliminary User Guide Rev 0 7 www kontron com 20 Figure 4 Bottom Side View Q7ALx2 1 Qseven connector 2 4x Mounting points 1 2 2 2 2...

Page 21: ...to 8 GB 2400 MT s eMMC Storage option 2 GByte to 32 GByte SLC eMMC 5 1 Flash or 2 GByte to 64 GByte MLC eMMC 5 1 Flash Controller Embedded Controller FPGA MAX10 controller for embedded feature set and...

Page 22: ...l Port 1x 4 wire UART interface TX RX CTS RTS at 3 3 VDC supported by the MAX10 FPGA SPI 1x fast SPI interface from primary SPI chip for external boot from Carrier BIOS SPI chip 1x SPI interface as se...

Page 23: ...2160 30Hz DP DP interface is DDI1 from SoC Resolution 4096x2160 60Hz Security TPM TPM option Note To use TPM the TPM feature must be enabled in the BIOS setup Kontron Security Solution Approtect Suppo...

Page 24: ...ic immunity standard Part1 Residential commercial and light industrial environment Internal test and declaration of conformity written by Kontron Technology only Safety International CE EN 62368 1 Com...

Page 25: ...eliminary User Guide Rev 0 7 www kontron com 25 Mechanical Specification 5 6 Figure 5 Q7ALx2 Top Side Mechanical Specification measurement in mm Figure 6 Q7ALx2 Bottom Side Mechanical Specification me...

Page 26: ...6 5 6 1 Heat Spreader Mechanical Specification Figure 7 Heat Spreader for Commercial Grade Mechanical Specification measurement in mm Figure 8 Heat Spreader for Industrial Grade Mechanical Specificati...

Page 27: ...rmal pad 5 Thermal pad 6 Thermal pad An external cooling device must be used to maintain the heatspreader plate at the specified operating temperature Under worst case conditions the cooling device mu...

Page 28: ...the module s temperature This measurement is referred to as the module temperature in the BIOS setup menu Advanced H W Monitor The HWM uses the SMBus interface see Table 13 SMBus Address Figure 10 HW...

Page 29: ...r rail Additionally two optional power rails supply other supported supply voltages such as 5 VDC standby and 3 VDC RTC The 3 V RTC voltage is provided by the Real Time Clock battery cell located on t...

Page 30: ...e active at the same time or after VCC comes up T3 Stop Sequence PWGIN must be inactive at the same time or before VCC goes down T4 VCC must go down at the same time or before VCC_SB goes down T5 VCC_...

Page 31: ...ry is low or may be used to signal some other external battery management event Wake 17 Wake Event this may be driven active low by external circuitry to signal an external wake up event SUS_S3 18 S3...

Page 32: ...ith the SM Bus The I2C controller supports Multimaster transfers Clock stretching Collision detection Interruption on completion of an operation GPIO 6 4 The eight GPIO pins GPI00 pin 185 GPIO1 pin 18...

Page 33: ...em complies with the Qseven Specification The LPC bus does not support DMA Direct Memory Access When more than one device is used on LPC a zero delay clock buffer is required that can lead to limitati...

Page 34: ...Bus SPI bus is a synchronous four wire serial data link standard Devices communicate in master slave mode where the master device initiates the data frame A master device can control one or multiple s...

Page 35: ...Performance States P state and C state use third party software to control the CPU Performance States TPM 2 0 option 6 12 The Trusted Platform Module TPM stores RSA encryption keys specific to the hos...

Page 36: ...o it also referred to as kicking the dog petting the dog feeding the watchdog or triggering the watchdog The Q7ALx2 module offers a watchdog that works with two stages that can be programmed independe...

Page 37: ...12 I2C Bus Port Address 8 bit I2C Address Used For Available Comment A0h JIDA EEPROM Yes Module EEPROM C0h LVDS PTN3460 Yes LVDS EEPROM SM Bus 7 3 The System Management SM Bus is an 8 bit address bus...

Page 38: ...V 20 CAM0_ENA 3 CAM0_CSI_D0 21 MCLK 4 CAM0_CSI_D0 22 CAM1_ENA 5 GND 23 CAM1_I2C_CLK 6 CAM0_CSI_D1 24 CAM1_I2C_DAT 7 CAM0_CSI_D1 25 GND 8 GND 26 CAM1_CSI_CLK 9 CAM0_CSI_D2 27 CAM1_CSI_CLK 10 CAM0_CSI_D...

Page 39: ...ow Pin Signal Top side row 1 GND 2 GND 3 GBE_MDI3 4 GBE_MDI2 5 GBE_MDI3 6 GBE_MDI2 7 GBE_LINK100 8 GBE_LINK1000 9 GBE_MDI1 10 GBE_MDI0 11 GBE_MDI1 12 GBE_MDI0 13 GBE_LINK 14 GBE_ACT 15 GBE_CTREF 16 SU...

Page 40: ...SB_P3 90 USB_P2 91 USB_VBUS 92 USB_ID 93 USB_P1 94 USB_P0 95 USB_P1 96 USB_P0 97 GND 98 GND 99 eDP0_TX0 LVDS_A0 100 eDP1_TX0 LVDS_B0 101 eDP0_TX0 LVDS_A0 102 eDP1_TX0 LVDS_B0 103 eDP0_TX1 LVDS_A1 104...

Page 41: ...4 PCIE3_RX 165 GND 166 GND 167 PCIE2_TX 168 PCIE2_RX 169 PCIE2_TX 170 PCIE2_RX 171 UART0_TX 172 UART0_RTS 173 PCIE1_TX 174 PCIE1_RX 175 PCIE1_TX 176 PCIE1_RX 177 UART0_RX 178 UART0_CTS 179 PCIE0_TX 18...

Page 42: ...QSEVEN Q7ALx2 Preliminary User Guide Rev 0 7 www kontron com 42 Pin Signal Bottom side row Pin Signal Top side row 221 VCC 222 VCC 223 VCC 224 VCC 225 VCC 226 VCC 227 VCC 228 VCC 229 VCC 230 VCC...

Page 43: ...seven Module with Carrier Board Assembly with Heaspreader Plate 1 Carrier board 2 Q7ALx2 module 3 Heatspreader plate 4 Qseven connector 5 Standoffs not supplied with module To connect the Q7ALx2 modul...

Page 44: ...Power on the module see Chapter 9 Power on 2 Wait until the first characters appear on the screen POST messages or splash screen 3 Press the DEL key 4 If the uEFI BIOS is password protected a request...

Page 45: ...two main frames The left frame displays all available functions Configurable functions are displayed in blue Functions displayed in grey provide information about the status or the operational configu...

Page 46: ...s the value used by the Ethernet controller and may contain the entry Inactive Ethernet chip is inactive To activate the Ethernet chip set the following Advanced Network Stack Configuration Network St...

Page 47: ...S features in this user guide are open to change and may not be the latest version The latest version may have differences to the options and features described in Table 19 Table 19 Advanced Setup men...

Page 48: ...not support 1 3 1 2 1 3 TPM 20 InterfaceType Read only field Device Select Selects BIOS support for security devices Auto supports both TPM 1 2 and TPM 2 0 TPM 1 2 restricts support to TPM 1 2 device...

Page 49: ...de Enables or disables processor turbo mode Note EMTTM must also be enabled Auto means enabled unless the max turbo ratio is bigger than 16 SKL A0 W A Enabled Disabled Intel VME Virtual Technology Ena...

Page 50: ...meout value for control bulk and interrupt transfers 1 sec 5 sec 10 sec 20 sec Device Reset Time out Displays USB mass storage device start unit command time out 10 sec 20 sec 30 sec 40 sec Device Pow...

Page 51: ...Bus to pass through to carrier board Mux to LPC Mux to GPIO GPI0 Mux Select MUX select for the pin as GPIO or SUS_STAT Mux to GPIO Mux to SUS_STAT Carrier Settings Carrier I2C0 SMBUS Switch to select...

Page 52: ...eed SerialIO SSC Enable HighSpeed SerialIO SSC configuration Enable Disable HighSpeed SerialIO SSC Selection T Select the item in SSC selection table for HighSpeed SerialIO spread spectrum 0 No SSC 0...

Page 53: ...isable or Select Processor trace memory region size from 4 KB to 128 MB Disabled 4KB 8KB 16KB 32KB 64KB 128KB 256KB 512KB 1MB 2MB 4MB 8MB 16MB 32MB 64MB 128MB CSE Data Clear Data Clear is for reset cl...

Page 54: ...ot be the latest version The latest version may have differences to the options and features described in Table 20 Table 20 Chipset Set North Bridge Sub screens and Function Function Second level Sub...

Page 55: ...rsion may have differences to the options and features described in Table 21 Table 21 Chipset Set South Bridge Sub screens and Functions Function Second level Sub Screen Description Serial IRQ Mode Co...

Page 56: ...ntron com 56 10 2 3 3 Chipset Uncore Configuration Figure 19 Chipset Uncore Configuration Menu Initial Screen Examples The following table shows the Uncore Configuration sub screens and functions and...

Page 57: ...hich of IGD PCI Graphics device should be Primary Display IGD PCIe HG RC6 render Standby Check to enable render standby support IF SOix is enabled RC6 should be enabled This function is read only if S...

Page 58: ...1680x1050 1920x1200 1280x800 IGD Boot Type Select preference for IGD display interface used when system boots Auto VGA port HDMI DP Port B Dp Port C eDP DSI Prt A DSI Port C Panel Scaling Sets Panel s...

Page 59: ...to the options and features described in Table 23 Table 23 Chipset South Cluster Configuration Sub screens and Functions Function Second level Sub Screen Description HD Audio Configuration HD Audio S...

Page 60: ...aim DSP Feature Bitmask structure BIT0 WoV BIT1 BT Sideband BIT2 Codec based VAD BIT3 SRAM Reclaim BIT5 BT Intel HFP BIT6 BT Intel A2DP BIT9 Context Aware Enabled Disabled BT Intel HFP DSP Feature Bit...

Page 61: ...nabled Codex based VAD DSP Feature Bitmask structure BIT0 WoV BIT1 BT Sideband BIT2 Codec based VAD BIT3 SRAM Reclaim BIT5 BT Intel HFP BIT6 BT Intel A2DP BIT9 Context Aware Enabled Disabled DSP based...

Page 62: ...Audio Host Memory Transfers Sets HD Audio Host memory transfers to VC0 VC2 VC0 VC2 HD Audio I O Buffer Ownership Select Sets HD Audio I O buffer ownership HD Audio link owns all the I O buffers I2S po...

Page 63: ...SEVEN PCIe 0 or PCI Root Port 1 QSEVEN PCIe 1 or PCI Root Port 2 QSEVEN PCIe 2 or PCI Root Port 3 QSEVEN PCIe 3 PCI Express Root Port Controls the PCI Express port Auto automatically disables the unus...

Page 64: ...dge 0 7 Reserved Memory Reserved memory and prefetchable memory for this root bridge Range 1 MB 20 MB Reserved I O Reserved I O for this root bridge Range 4 k 8 k 12 k 16 k 20 k PCH PCIE LTR PCH PCIE...

Page 65: ...E Comparators USB HW mode AFE comparators Enabled Disabled Miscellaneous Configuration State After G3 Specifies the state to go to if power is reapplied after power failure G3 state S0 state system bo...

Page 66: ...Screen Description Miscellaneous Configuration continued DCI Auto Detect Enable If set DCI Auto detects if DCI is connected during BIOS post time and enables DCI If not set DCI is disabled Enabled Di...

Page 67: ...ange and may not be the latest version The latest version may have differences to the options and features described in Table 24 Table 24 Security Setup Menu Initial Screen Function Description Setup...

Page 68: ...Secure Boot Mode Set UEFI Secure Boot Mode to STANDARD mode or CUSTOM mode Standard Customized Key Management Enables expert users to modify Secure Boot Policy variables without full authentication Pr...

Page 69: ...passwords in a safe place Forgotten passwords results in the user being locked out of the system If the system cannot be booted because the User Password or the Supervisor Password are not known clear...

Page 70: ...latest version may have differences to the options and features described in Table 25 Table 25 Boot Setup Menu Sub screens and Functions Function Description Setup Prompt Timeout Displays number of se...

Page 71: ...untill after OS boot If Partial Initial USB Mass Storage and specific USB port device will NOT be available before OS boot If Full Initial all USB devices will be available in OS and Post Full Initial...

Page 72: ...g changes Discard Changes and Exit Exits system setup without saving changes Save Changes and Reset Resets system after saving changes Discard Changes and Reset Resets system setup without saving chan...

Page 73: ...ll forms an entry into the uEFI boot order and is the first boot option by default 10 3 1 1 Entering the uEFI Shell To enter the uEFI Shell follow the steps below 1 Power on the module see Chapter 9 P...

Page 74: ...he startup script terminates then the default boot order is continued 10 4 2 Create a Startup Script Startup scripts can be created using the uEFI Shell built in editor edit or under any OS with a pla...

Page 75: ...tem into setup 2 Change the following setup items Chipset South Cluster Configuration Miscellaneous Configuration BIOS Lock Disabled 3 Save and Exit the BIOS setup Changes are only effective during th...

Page 76: ...ition Audio HD Audio HD HDD Hard Disk Drive HDMI High Definition Multimedia Interface HWM Hardware Monitor I2C Inter integrated Circuit Communications I2S Inter IC Sound IOT Internet of Things JTAG Jo...

Page 77: ...plications With its standard products and tailor made solutions based on highly reliable state of the art embedded technologies Kontron provides secure and innovative applications for a variety of ind...

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