COMe-cTL6 – User Guide Rev. 1.7
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6.4.3.2.
Chipset PCH-IO Configuration Setup Menu
Figure 19: Chipset PCH-IO Configuration Setup menu Initial Screen
The following table shows the Chipset PCH-IO Configuration sub-screens and describes the functions. Default
settings are in bold.
Table 70: Chipset PCH-IO Configuration
Function
Second level Sub-Screen/Description
PCI Express
Configuration>
COMe PCIe mapping scheme
5x1 (Standard)
Port8xh Decode
PCI Express Port 8xh Decode
[Enabled, Disabled]
PCIe Root Port 1, 2, 3, 4, 11, 12>(USB/SATA)
PCIe Root Port 5> (COMe Lane 0)
PCIe Root Port 6> (COMe Lane 1)
PCIe Root Port 7> (COMe Lane 2)
PCIe Root Port 8> (COMe Lane 3)
PCIe Root Port 9> (COMe Lane 4)
PCIe Root Port 10> (on-module Ethernet)
PCI Expr.
Root Port #
Control the PCIe 4.0 Root port.
[Enabled, Disabled]
Connection
Type
Selects the connection type to root
port.
[Built-in, Slot]
ASPM
Sets the ASPM level:
[Disabled, L0s, L1, L0sL1, Auto]
PME SCI
[Enabled, Disabled]
Hot Plug
[Enabled, Disabled]
PCIe Speed Configure PCIe Speed
[Auto, Gen1, Gen2, Gen3]
