Samsung D61B, Training Manual

Page: 43 / 116

Circuit Operation Description
Samsung Electronics 6-5
4. Logic <-> ADDRESS BUFFER(LOWER)
L
G20
01
CN31
00
Pin
no
Name
Pi
n
n
o
Name
1
GN
D
26
DOWN-POL0
2
DO
WN-R0
27
DOW
N
-ST
B
0
3
DO
WN-G0
28
GND
4
DOWN
-B0
29
DOWN-
R4
5
DO
WN-R1
30
DOWN-G4
6
DO
WN-G1
31
DO
WN
-B4
7
DOWN
-B1
32
DOWN-
R5
8
GN
D
33
DOWN-G5
9
DO
W
N
-C
L
K
-
B
B0
34
DO
WN
-B5
10
GN
D
35
GND
11
DO
W
N
-CLK-B0
36
DOWN
-CLK-
AA0
2
GN
D
37
GND
13
DO
WN-R2
38
DO
W
N
-CLK-A0
14
DO
WN-G2
39
GND
15
DOWN
-B2
40
DOWN-
R6
16
DO
WN-R3
41
DOWN
-G6
17
DO
WN-G3
42
DO
WN
-B6
18
DOWN
-B3
43
DOWN-
R7
19
GN
D
44
DOWN
-G7
20
ERC09
45
DO
WN
-B7
21
ERC10
46
N.C
22
ERC11
47
A5V
23
ERC12
48
A5V
24
GND
49
A5V
25
DOWN-BLK0
50
A5V
LG
200
2
C
N3200
Pin
no
Name
Pin
no
Name
1
GN
D
26
DOWN-POL1
2
DO
WN
-R8
27
DOWN-STB1
3
DO
WN
-G8
28
GND
4
DOWN
-B8
29
DOWN-R12
5
DO
WN
-R9
30
DOWN-
G
12
6
DO
WN
-G9
31
DO
WN
-B12
7
DOWN
-B9
32
DOWN-R13
8
GN
D
33
DOWN-
G
13
9
DO
W
N
-C
L
K
-
B
B1
34
DO
WN
-B13
10
GN
D
35
GN
D
11
DO
W
N
-CLK-B1
36
DOWN-CLK-A
A1
12
GN
D
37
GN
D
13
DO
WN
-R1
0
38
DOWN-CLK-A1
14
DO
WN
-G
10
39
GN
D
15
DOWN-
B10
40
N.C
16
DO
WN
-R1
1
41
N.C
17
DO
WN
-G
11
42
N.C
18
DOWN-
B
11
43
N.C
19
GN
D
44
N.C
20
ERC09
45
N.C
21
ERC10
46
N.C
22
ERC11
47
A5V
23
ERC12
48
A5V
24
GND
49
A5V
25
DOWN-BLK1
50
A5V
LG
200
3
C
N3300
Pi
n
n
o
Name
Pi
n
n
o
Name
1
GN
D
26
DOWN-POL2
2
DO
WN
-R1
4
27
DOWN-STB2
3
DO
WN
-G
14
28
GND
4
DOWN-
B
14
29
DOWN-R18
5
DO
WN
-R1
5
30
DOWN-
G
18
6
DO
WN
-G
15
31
DO
WN
-B18
7
DOWN-
B
15
32
DOWN-R19
8
GN
D
33
DOWN-
G
19
9
DO
W
N
-C
L
K
-
B
B2
34
DO
WN
-B19
10
GN
D
35
GND
11
DO
W
N
-CLK-B2
36
DOWN
-CLK-
AA2
12
GN
D
37
GND
13
DO
WN
-R1
6
38
DO
W
N
-CLK-A2
14
DO
WN
-G
16
39
GND
15
DOWN-
B
16
40
DOWN-R20
16
DO
WN
-R1
7
41
DOWN-
G
20
17
DO
WN
-G
17
42
DO
WN
-B20
18
DOWN-
B17
43
DOWN-R21
19
GN
D
44
DOWN-
G
21
20
ERC13
45
DO
WN
-B21
21
ERC14
46
N.C
22
ERC15
47
A5V
23
ERC16
48
A5V
24
GND
49
A5V
25
DOWN-BLK2
50
A5V
<->
<->
<->
Logic <-> Addr.Buf(E)
Logic <-> Addr.Buf(F)
Logic <-> Addr.Buf(G)