Ross HDC-8222A, User Manual

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1–4 • Introduction HDC-8222A User Manual (Iss. 02)
Functional Block Diagrams
This section provides functional block diagrams that outline the workflow of the HDC-8222A.
Figure 1.1 HDC-8222A — Simplified Block Diagram (8310AR-030 and 8320AR-030 Rear Modules)
Figure 1.2 HDC-8222A — Simplified Block Diagram (8320AR-1821 Rear Module)
SW
Input RCLK Copy 1
Input RCLK Copy 2
Input RCLK Copy 3
Input RCLK Copy 4
SD-SDI CVBS 1
Dual Rate
Input
Equalizer
HD / SD-SDI
Input
SD
Serializer
SD
Driver
SD
Encoder
SD Analog
Output
SD-SDI CVBS 4
SD-SDI CVBS 3
SD-SDI CVBS 2
Dual Rate
Reclock,
Decode and
De-serialize
Down
Conversion
and
ARC
Audio
Memory
Path
Routing
and
Reticule
Overlay
Re-clocked
Outputs
Input RCLK Copy 1
Input RCLK Copy 2
Dual Rate
Input
Equalizer
HD / SD-SDI
Input
SD
Serializer
SD
Driver
SD
Encoder
SD Analog
Output
SD-SDI CVBS 1
SD-SDI CVBS 2
Dual Rate
Reclock,
Decode and
De-serialize
Down
Conversion
and
ARC
Audio
Memory
Path
Routing
and
Reticule
Overlay
Re-clocked
Outputs
ANLG Audio Out 1
ANLG Audio Out 3
ANLG Audio Out 4
Audio
DA
ANLG Audio Out 2
SW