Rohm BU7858KN, Technical Note

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● I
2
C INTERFACE
【
BU7893GU
】
In the BU7893GU, the LSI can be controlled by using I
2
C interface.
The device’s address (slave address) is "1100011(63h)". It
is based on
the Philips I
2
C-BUS V2.1’s fast-mode, the
maximum transfer rate of a bit is 400kbps.
A7 A6 A5 A4 A3 A2 A1 W/R
1 1 0 0 0 1 1 0/1
I
2
C Slave addresses
・
Bit Transfer
A data is transferred during the HIGH period of the clock . The data on the SIO line must be stable during this period. The
HIGH or LOW state of the data line can only change when the clock signal on the SCLK line is LOW. When SCL is H and
SDA changes, the START conditions or the STOP condition is generated, and it is interpreted as the control signal.
・
START & STOP Conditions
When SIO and SCLK are “H”, there is no data transfer performed on the I
2
C bus. A HIGH to LOW transition on the SIO line
while SCLK is HIGH is one such unique case. This situation indicates a START condition (S).
A LOW to HIGH transition on the SIO line while SCLK is HIGH defines a STOP condition (P).
The consecutive START and STOP conditions are acceptable.
・
Acknowledge
After START condition, 8 bits of data is transferred at a time. The transmitter releases the SIO line, and the receiver
returns the Acknowledge signal by assuming SIO to be “L”.
SIO
SCLK
SIO is stable.
Valid Data
SIO is possible
to change
SIO
SCL
S P
START conditions
STOP conditions
SCLK 1 2 8 9
SIO output
by the transmitter
Acknowledge
Non-Acknowledge
S
START condition
Clock pulse
for Acknowledge
SIO output
by the receiver