Rohm BU7858KN, Technical Note

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【 BU7893GU 】
・
Timing Chart
AD[6] AD[5] AD[0] Direction DT[7] DT[6] DT[0] DT[1]
SCLK
SIO
SEL
AD[4]
Tscss
Tsc Thc
When direction is "1": Write operation
When direction is "0": Read operation
・
Write Operation
SEL
AD[6] AD[5] DT[7] DT[6] DT[0] DT[1]
SCLK
SIO
AD[4] AD[0]
Direction”H”
・
Read Operation (mode 1): SO_ENABLE (bit0 at register address 14h)=0
SCLK
DT[7] DT[6] DT[1]
SIO
Hi-Z
AD[6] AD[5] AD[4] AD[0]
SEL
Direction”L”
DT[0]
Output data
Tsd
・
Read Operation (mode 2): SO_ENABLE (bit0 at register address 14h)=1
SIO
SCLK
SEL
DT[7] DT[6] DT[0] DT[1]
SO
Output data
AD[6] AD[5] AD[4] AD[0]
Direction”L”
DT[5]
Hi-Z Hi-Z
Tsd
Fig.34 CPU I/F Timing Chart (BU7893GU)
DVDD_IO=1.62 ～ 3.3V 、 Ta=-30 ～ +85 ℃
Item Symbol Min Typ Max Unit Conditions
Bit Length Ncha 16
－ －
bit MSB first
SCLK Input Frequency FSCLK － － 15 MHz
SCLK ‘L’ Pulse Width Tlsclk 25 － － ns
SCLK ‘H’ Pulse Width Thsclk 25
－ －
ns
SCLK-SEL Set-up Time Tscss 10 － － ns
Data Set-up Time Tsc 10
－ －
ns
Data Hold Time Thc 10 － － ns
Delay Time of Data Output Tsd － － 30 ns
SIO: Time from SCLK falling edge
SO : Time from SCLK rising edge
It is recommended to use exclusive lines for CPU interface.