SH7262/SH7264 Group
Hardware Design Guide
REJ06B0999-0100 Rev. 1.00
Page 4 of 36
Jun. 30, 2010
PLLVcc
PLLVss
Vcc
Vss
Power supply
Signal lines prohibited
Note: When designing the PLLVcc and PLLVss connection pattern for the PLL, signal lines from the board
power supply pins must be as short as possible and pattern width must be as wide as possible to
reduce inductive interferences. Since the analog power supply pins of the PLL are sensitive to the
noise, the system may mulfunction due to inductive interference at the other power supply pins. To
prevent such malfunction, do not supply the same resources to the analog power supply pins and the
digital power supply pins Vcc and PVcc on the board if at all possible.
Figure 1 Note on Using PLL Oscillation Circuit
