SH7262/SH7264 Group
Hardware Design Guide
REJ06B0999-0100 Rev. 1.00
Page 17 of 36
Jun. 30, 2010
5. External
ROM
5.1
NOR Flash Memory
Figure 10 shows an example of NOR flash memory circuit.
For more information, refer to the application note "SH7262/SH7264 Group Connecting the NOR Flash Memory".
CE#
OE#
WE#
DQ15 to DQ0
A19 toA0
A20
BYTE#
WP#/ACC
RY/BY#
RESET#
VCC
VIO
NOR Flash Memory
3.3 V
CS0#
RD#
WE0#
D15 to D0
A20 to A1
PB21/A21
MD_BOOT1
MD_BOOT0
RES#
VSS
SH7264
PVCC
VSS
3.3 V
20-bit
16-bit
Note: As damping resistors for signal lines are not indicated, install resistors according to your system
configuration.
3.3 V
NC
Reset signal
3.3 V
Figure 10 Typical NOR Flash Memory Circuit
5.1.1
Data Bus Width
On the SH7264 device, CS0 space (area 0) is fixed to 16-bit bus width. The NOR flash memory on CS0 must be
connected to operate as 16-bit memory. The NOR flash memory shown in Figure 10 is fixed to 16 bit operation by
setting the BYTE# pin to high level.
To boot the SH7264 from NOR flash memory, fix the SH7264 MD_BOOT0 and MD_BOOT1 pins to low level (boot
mode 0).
5.1.2
NOR Boot Mode BSC Initial State
In Boot Mode 0 (NOR Boot), the Bus State Controller must be programmed to operate with NOR FLASH. To provide
maximum flexibility in the engineers design, the minimal configuration is performed as follows, A1-A20 active, D0-
D15 as data bus, RD# and CS0# active. Engineers implementing large NOR FLASH using address lines above A20,
must pull these down using resistors to logic 0 to allow code to be fetched from address 0 in the NOR FLASH. An
example of this is shown in Figure 10 on A21. Once the user’s code is running they can program the BSC to support
the higher address lines as required by their design.
5.1.3 Control
signals
The WE0# is configured as I/O port as default, and will be input by default on power up (Hi-Z) until the BSC is
programmed, so a pull-up is recommend to avoid improper operation of the NOR FLASH as shown in Figure 10
(note)
.
NOTE: In general control signals will be undefined during the RESET period before the BSC is initialized, so to get
more stable memory operation, pull up pins CS0#, RD#, and WE0# to high level using external resistors. Pull-ups are
also recommended on any other CS# and WE# signals used in your design.
