R01UH0822EJ0100 Rev.1.00
Page 191 of 1041
Jul 31, 2019
RX13T Group
13. Exception Handling
13.2
Exception Handling Procedure
In the exception handling, part of the processing is handled automatically by hardware and part of it is handled by a
program (exception handling routine) that has been written by the user.
shows the processing procedure
when an exception other than a reset is accepted.
Figure 13.2
Outline of Exception Handling Procedure
(For the fast interrupt)
PC BPC
PSW BPSW
U = 0
I = 0
PM = 0
(For exceptions other than the fast interrupt)
PC Saved on the stack (ISP)
PSW Saved on the stack (ISP)
U = 0
I = 0
PM = 0
(For the fast interrupt)
BPC PC
BPSW PSW
(For exceptions other than the fast interrupt)
Stack PC
Stack PSW
Switches to the user mode
when the PM bit in PSW is 1.
Switches to the supervisor mode.
Hardware pre-processing
Exception request
Instruction
A
Instruction
B
Instruction
C
Instruction
D
Instruction
C
Restarting of program execution
User-written processing program
Branch to the vector read handling routine
Generation of
exception event
General-purpose
registers saved
on the stack
Handling routine
Restoration of
general-purpose
registers
(For the fast interrupt)
RTFI instruction
(For exceptions other than the fast
interrupt)
RTE instruction
Non-maskable
interrupt handling
Program completion or system reset
Non-maskable interrupt
UND : Undefined instruction exception
PIE
: Privileged instruction exception
FPE
: Floating-point exception
EI
: Interrupt
TRAP : Unconditional trap
Hardware post-processing
• Instruction canceling type
(UND, PIE, FPE)
• Instruction suspending type
(Reception of an EI during execution of
the RMPA instruction or a string
manipulation instruction)
• Instruction completion type
(EI and TRAP)
Exception handling routine
other than the non-maskable
interrupt
The program is suspended and
the exception is accepted.