Renesas H8/38342, Hardware Manual

Page: 343 / 721

Section 9 Timers
Rev. 6.00 Aug 04, 2006 page 305 of 680
REJ09B0145-0600
4. Timing of Input Capture by Input Capture Input
Figure 9.13 shows the timing of input capture by input capture input
Input capture
signal
TCG
N-1 N
N H'XX
N+1
Input capture
register
Figure 9.13 Timing of Input Capture by Input Capture Input
5. TCG Clear Timing
TCG can be cleared by the rising edge, falling edge, or both edges of the input capture input
signal.
Figure 9.14 shows the timing for clearing by both edges.
Input capture
input signal
Input capture
signal F
Input capture
signal R
TCG N N H'00 H'00
Figure 9.14 TCG Clear Timing