Section 10 Serial Communication Interface
Rev. 6.00 Aug 04, 2006 page 383 of 680
REJ09B0145-0600
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Transmitting
Figure 10.11 shows an example of a flowchart for data transmission. This procedure should be
followed for data transmission after initializing SCI3.
Start
End
Read bit TDRE
in SSR
Sets bits SPC31 and
SPC32 to 1 in SPCR
1
2
3
Write transmit
data to TDR
Read bit TEND
in SSR
Set PDR = 0,
PCR = 1
Clear bit TE to 0
in SCR3
No
TDRE = 1?
Yes
Continue data
transmission?
No
TEND = 1?
No
Yes
Yes
Yes
No
Break output?
Read the serial status register (SSR)
and check that bit TDRE is set to 1,
then write transmit data to the transmit
data register (TDR). When data is
written to TDR, bit TDRE is cleared to 0
automatically.
(After the TE bit is set to 1, one frame of
1s is output, then transmission is possible.)
When continuing data transmission,
be sure to read TDRE = 1 to confirm that
a write can be performed before writing
data to TDR. When data is written to
TDR, bit TDRE is cleared to 0
automatically.
If a break is to be output when data
transmission ends, set the port PCR to 1
and clear the port PDR to 0, then clear bit
TE in SCR3 to 0.
1.
2.
3.
Figure 10.11 Example of Data Transmission Flowchart (Asynchronous Mode)
Summary of Contents for H8/38342
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Page 76: ...Section 1 Overview Rev 6 00 Aug 04 2006 page 38 of 680 REJ09B0145 0600...
Page 240: ...Section 7 RAM Rev 6 00 Aug 04 2006 page 202 of 680 REJ09B0145 0600...
Page 468: ...Section 12 A D Converter Rev 6 00 Aug 04 2006 page 430 of 680 REJ09B0145 0600...
Page 580: ...Section 15 Electrical Characteristics Rev 6 00 Aug 04 2006 page 542 of 680 REJ09B0145 0600...