Realtek RTD2120-series
confidential
11
To activate software reset, set FF39[1](SOF_RST). When software reset is triggered, it will reset
all modules except debug mode.
l
Watchdog timer(WDT)
The watchdog timer generates reset when it is overflowed. The watchdog timer resets almost the
same modules as software reset except itself(watchdog timer module).
l
In System Programing(ISP) reset
ISP reset will generate when entering ISP mode. Compared to Watchdog timer reset, ISP mode
resets almost the same modules as Watchdog timer except itself(ISP module).
Debug mode
module
Watchdog timer
module
CPU
ISP module and
other modules
RST pin
O
O
O
O
LVR & POR
O
O
O
O
Software reset
x
O
O
O
WDT reset
x
x
O
x
ISP reset
x
x
O
x
Note: O = Reset , x = No effect
Interrupt
Six interrupts are provided in RTD2120. Four of these are generated automatically by internal
operation: timer 0, timer 1, timer 2 and the serial port interrupt. The other two interrupts are triggered
by external pins: INT0 and INT1. Moreover, the DDC and IIC interrupts are connected to DW8051
1
INT
source as the following figure.
A_WR_I
AWRI_EN
D_WR_I
DWRI_EN
128VS_I
VSI_EN
STOP_I
STOPI_EN
D_OUT_I
DOLI_EN
D_IN_I
DILI_EN
SUB_I
SUBI_EN
SLV_I
SLVI_EN
PIN_INT1_EN
pin INT1
to DW8051
1
INT
Timer/Counter
RTD2120 has three timers/counters: T0, T1 andT2. T0 and T1 are fully compatible to
timer/counter in standard 8051
’
s. Like timer2 in 8052, T2 of RTD2120 has three operating modes: 16-
bit timer/counter with capture, 16-bit auto-reload timer/counter and Baud rate generator. However, T2
of RTD2120 does not support
“
Timer2 output enable(T2OE)
”
and
“
downcount enable(DCEN)
”
. The
SFRs associated with Timer2 are listed below.
Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Addr
T2CON
TF2
EXF2
RCLK
TCLK
EXEN2 TR2
C/T2
CP/RL2 C8h
RCAP2L
CAh