T Logical "And" (AND)
t>HT"ECT S
1B
Repeatable
General Description
This instruction is one of three instructions which provides the 301 system with bit manipulation abilities.
It operates on operands of equal length according to the rules outlined under "Outline of Operation" below.
Format
Operation —T
N
—Number (0-44) of characters in each operand. (See Appendix F-I.)
A Address — HSM location of least significant digit of the first operand and the result.
B Address — HSM location of least significant digit of the second operand.
Direction of Operation
Right to left.
Outline of Operation
This instruction operates in the following cycle:
The contents of the N Register are examined. If zero, the instruction terminates. If other than zero, the contents
of the HSM location specified by the A Register are combined bit by bit with the contents of the HSM location
specified by the B Register. This bit manipulation is combined according to the following rules:
Bit in
First Operand
Bit in
Second Operand
Bit in Result
0
0
0
0
1
0
1
0
0
1
1
1
The result of the combination is placed in the HSM location specified by the A Register. The contents of the
A, B, and N Registers are decremented by one and the instruction is repeated.
All six information bits of each operand enter the operation. The proper parity for each result character is
generated as part of this instruction.
Example of Rules
(a) 1 00 1001
(b) 0 11 0001
1 01 0001
0 10 0011
0 00 0001
1 10 0001
Final Register Contents
(A), = Address of location one to left of the most significant digit of the result.
(B)
f
= Address of location one to the left of the most significant digit of second operand.
PRI
PRP is set, if at least one of the information bits in the result is a one.
PRN is set, if all the information bits in the results are zero.
VI-10
Summary of Contents for 301
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