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5 Read Simultaneous (RFS)
General Description
This instruction reads a series of consecutive characters from a magnetic card on a 3488 unit starting at the block
previously selected by the Select instruction. The instruction terminates and the transfer of information ends when the
specified HSM area is filled
or the last character of block 255 is read, whichever occurs first. This instruction is
performed in the Simultaneous Mode.
Format
Operation — 5
N
— Specifies device number.
(60)
8
to (63)
8
on Model 380-14 channel.
(64)
8
to (67)
8
on Model 380-24 channel.
A Address — Address of the HSM location that is to receive the first character of the block previously specified by
a Select instruction. Must be an even address.
B Address — Address of the HSM location that is to receive the next to last character read. Must be an even address.
Outline of Operation
If all conditions are acceptable, the read begins when the 3488 unit indicates that the beginning of the selected
block has been reached. The Block Address Register in the 3488 unit counts up with each block read.
If A-B Equality is not obtained by the completion of the read of the last block of the band, the block address
is incremented by one and, if required, the heads are repositioned. When this occurs, the channel will not termi
nate the instruction. The read continues when the first
character of the next block is in position to be read.
Reading of a complete block is not mandatory; A-B Equality can be used to terminate the read whenever desired.
Reads will automatically terminate after block 255.
When A-B Equality is reached, data transfer and the Read instruction are terminated, the Simultaneous Mode
and the channel are freed; however, the 3488 unit remains busy with the read until the interblock gap is reached.
When the interblock gap is reached, the
Test for Read or Write busy indicator is reset and a Block Preselect, if any,
is executed.
Whether the card stays on or leaves the capstan after a read is terminated is under control of the Select instruc
tion. If a single bit within a character is missed during a read, the hardware automatically replaces the missing bit, sets
the
single bit corrected indicator, and continues reading. If more than one bit within a character is missed, (57)
s
replaces the bad parity character in core memory, the
parity error indicator is set and the read operation continues;
any subsequent bad parity characters are also replaced by (57)
8
's. When a read is terminated with the
parity error
indicator set, the card remains on the capstan even though the
select instruction specified its removal. Information
following the first error character within the same block is not reliable.
When a read is illogically issued following either an
unconditional card removal, or a conditional card removal
(Select option A
2
2° = 0) the instruction remains staticized until a card reaches the capstan or the unit goes inoperable.
The channel allows only one read (or write) operation at a time. Two channels allow two reads (or writes or
read and write) simultaneously.
If a Read instruction is issued that misses the beginning of its specified block the operation is automatically held
off until the block approaches on the next revolution.
Final Register Contents
(S)
f
= Address of HSM location one to the right of the last character transferred to memory.
(T), = (B),
XV-6
Summary of Contents for 301
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