1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A
A
B
B
C
C
D
D
PM_EXTTS#0
PM_EXTTS#1
PM_EXTTS#0
PM_EXTTS#1
PLTRST#_R
PLTRST#_R
THERMTRIP_MCH#
THERMTRIP_MCH#
SMRCOMPP
SMRCOMPN
MCH_CLVREF
CFG6
CFG7
CFG5
SM_RCOMP_VOH
SM_RCOMP_VOL
CFG18
CFG19
CFG20
CFG11
CFG10
CFG9
CFG13
CFG12
CFG16
CFG3
CFG4
CFG8
CFG14
CFG15
CFG17
SM_RCOMP_VOH
SM_RCOMP_VOL
SMRCOMPN
SMRCOMPP
PCIE_MTX_GRX_C_N2
PCIE_MTX_GRX_C_N3
PCIE_MTX_GRX_C_P3
PCIE_MTX_GRX_C_P0
PCIE_MTX_GRX_C_N6
PCIE_MTX_GRX_C_N7
PCIE_MTX_GRX_C_N4
PCIE_MTX_GRX_C_N5
PCIE_MTX_GRX_C_P6
PCIE_MTX_GRX_C_P7
PCIE_MTX_GRX_C_P4
PCIE_MTX_GRX_C_P5
PCIE_MRX_GTX_N1
PCIE_MRX_GTX_N2
PCIE_MRX_GTX_N3
PCIE_MRX_GTX_N4
PCIE_MRX_GTX_N0
PCIE_MRX_GTX_N5
PCIE_MRX_GTX_N6
PCIE_MRX_GTX_N7
PCIE_MRX_GTX_N8
PCIE_MRX_GTX_N9
PCIE_MRX_GTX_N10
PCIE_MRX_GTX_N11
PCIE_MRX_GTX_N12
PCIE_MRX_GTX_N13
PCIE_MRX_GTX_N14
PCIE_MRX_GTX_N15
PCIE_MRX_GTX_P0
PCIE_MRX_GTX_P1
PCIE_MRX_GTX_P2
PCIE_MRX_GTX_P3
PCIE_MRX_GTX_P4
PCIE_MRX_GTX_P5
PCIE_MRX_GTX_P6
PCIE_MRX_GTX_P7
PCIE_MRX_GTX_P8
PCIE_MRX_GTX_P9
PCIE_MRX_GTX_P10
PCIE_MRX_GTX_P11
PCIE_MRX_GTX_P12
PCIE_MRX_GTX_P13
PCIE_MRX_GTX_P14
PCIE_MRX_GTX_P15
PCIE_MTX_GRX_C_N0
PCIE_MTX_GRX_C_N10
PCIE_MTX_GRX_C_N11
PCIE_MTX_GRX_C_N14
PCIE_MTX_GRX_C_N15
PCIE_MTX_GRX_C_N12
PCIE_MTX_GRX_C_N13
PCIE_MTX_GRX_C_N8
PCIE_MTX_GRX_C_N9
PCIE_MTX_GRX_C_N1
PCIE_MTX_GRX_C_P10
PCIE_MTX_GRX_C_P11
PCIE_MTX_GRX_C_P8
PCIE_MTX_GRX_C_P14
PCIE_MTX_GRX_C_P15
PCIE_MTX_GRX_C_P12
PCIE_MTX_GRX_C_P13
PCIE_MTX_GRX_C_P9
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N15
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_C_P1
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_C_P2
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P15
PCIE_MTX_GRX_P14
VCC3G_PCIE_R
MCH_CLVREF
CPU_MCH_BSEL0
3,17
CPU_MCH_BSEL1
3,17
CPU_MCH_BSEL2
3,17
PM_BMBUSY#
13
PM_EXTTS#0
15
PM_EXTTS#1
15
DPRSLPVR
13,51
PLTRST#
12,28,29,31,32,40
H_DPRSTP#
3,11,51
THERMTRIP_MCH#
37
DDR_CS1_DIMMA#
15,16
DDR_CS0_DIMMA#
15,16
DDR_CS3_DIMMB#
15,16
DDR_CS2_DIMMB#
15,16
DDR_CKE3_DIMMB
15,16
DDR_CKE4_DIMMB
15,16
DDR_CKE1_DIMMA
15,16
DDR_CKE0_DIMMA
15,16
M_CLK_DDR#4 15
M_CLK_DDR4
15
M_CLK_DDR#3 15
M_CLK_DDR3
15
M_CLK_DDR#1 15
M_CLK_DDR1
15
M_CLK_DDR#0 15
M_CLK_DDR0
15
M_ODT0 15,16
M_ODT1 15,16
M_ODT2 15,16
M_ODT3 15,16
DMI_MRX_ITX_N0 12
DMI_MRX_ITX_N1 12
DMI_MRX_ITX_P0 12
DMI_MRX_ITX_P1 12
DMI_MTX_IRX_N0 12
DMI_MTX_IRX_N1 12
DMI_MTX_IRX_P0 12
DMI_MTX_IRX_P1 12
DMI_MRX_ITX_N2 12
DMI_MRX_ITX_N3 12
DMI_MRX_ITX_P2 12
DMI_MRX_ITX_P3 12
DMI_MTX_IRX_N2 12
DMI_MTX_IRX_N3 12
DMI_MTX_IRX_P2 12
DMI_MTX_IRX_P3 12
ICH_CL_RST0#
13
ICH_CL_PWROK
13,31
MCH_ICH_SYNC#
13
CLK_3GPLLREQ# 17
ICH_PWRGD
13,44
CL_CLK0 13
CL_DATA0 13
PCIE_MRX_GTX_N[0..15]
18
PCIE_MRX_GTX_P[0..15] 18
PCIE_MTX_GRX_N[0..15]
18
PCIE_MTX_GRX_P[0..15] 18
CLK_MCH_3GPLL# 17
CLK_MCH_3GPLL 17
DDR_A_MA14
15,16
DDR_B_MA14
15,16
SB_NB_PCIE_RST#
12
+3.3V_RUN
+1.05V_VCCP
V_DDR_MCH_REF
+3.3V_RUN
+1.8V_SUS
+1.8V_SUS
+VCC_PEG
+1.25V_RUN
Title
Size
Document Number
Rev
Date:
Sheet
of
QUANTA
COMPUTER
JM7B
2A
Crestline (VGA,DMI)
6
57
Thursday, September 14, 2006
Title
Size
Document Number
Rev
Date:
Sheet
of
QUANTA
COMPUTER
JM7B
2A
Crestline (VGA,DMI)
6
57
Thursday, September 14, 2006
Title
Size
Document Number
Rev
Date:
Sheet
of
QUANTA
COMPUTER
JM7B
2A
Crestline (VGA,DMI)
6
57
Thursday, September 14, 2006
Layout Note:
Location of all MCH_CFG strap
resistors needs to be close to
minmize stub.
SDVO Present.
Low=No SDVO Device Present
(default)
High=SDVO Device Present
DMI X2 Select
PCI Express
Graphic Lane
FSB Dynamic
ODT
SDVO/PCIE
Concurrent
Operation
CFG19
CFG20
Low= Reveise Lane
High=Normal operation
CFG5
Low=Dynamic ODT Disable
High=Dynamic ODT Enable(default).
CFG9
Low=Only SDVO or PCIEx1 is
operational (defaults)
High=SDVO and PCIEx1 are operating
simultaneously via PEG port
Low=Normal(default).
High=Lane Reversed
DMI Lane
Reversal
Low=DMIx2
High=DMIx4(Default)
CFG16
SDVO_CRTL_DATA
Non-iAMT
Santa Rosa Platform MOW WW15
For 4Gb DRAM support,
change Pin-BJ29 to DDR_A_MA14,
change Pin-BE24 to DDR_B_MA14.
C150
0.1U/10V
C150
0.1U/10V
1
2
T71
PAD T71
PAD
C121
0.1U/10V
C121
0.1U/10V
1
2
R437
0
R437
0
1
2
LVDS
PCI-EXPRESS GRAPHICS
TV
VGA
U12C
CRESTLINE_1p0
LVDS
PCI-EXPRESS GRAPHICS
TV
VGA
U12C
CRESTLINE_1p0
PEG_COMPI
N43
PEG_COMPO
M43
PEG_RX#_0
J51
PEG_RX#_1
L51
PEG_RX#_2
N47
PEG_RX#_3
T45
PEG_RX#_4
T50
PEG_RX#_5
U40
PEG_RX#_6
Y44
PEG_RX#_7
Y40
PEG_RX#_8
AB51
PEG_RX#_9
W49
PEG_RX#_10
AD44
PEG_RX#_11
AD40
PEG_RX#_12
AG46
PEG_RX#_13
AH49
PEG_RX#_14
AG45
PEG_RX#_15
AG41
PEG_RX_0
J50
PEG_RX_1
L50
PEG_RX_2
M47
PEG_RX_3
U44
PEG_RX_4
T49
PEG_RX_5
T41
PEG_RX_6
W45
PEG_RX_7
W41
PEG_RX_8
AB50
PEG_RX_9
Y48
PEG_RX_10
AC45
PEG_RX_11
AC41
PEG_RX_12
AH47
PEG_RX_13
AG49
PEG_RX_14
AH45
PEG_RX_15
AG42
PEG_TX#_0
N45
PEG_TX#_10
AC46
PEG_TX#_3
N51
PEG_TX#_4
R50
PEG_TX#_5
T42
PEG_TX#_6
Y43
PEG_TX#_7
W46
PEG_TX#_8
W38
PEG_TX#_9
AD39
PEG_TX#_1
U39
PEG_TX#_11
AC49
PEG_TX#_12
AC42
PEG_TX#_13
AH39
PEG_TX#_14
AE49
PEG_TX#_15
AH44
PEG_TX#_2
U47
PEG_TX_0
M45
PEG_TX_1
T38
PEG_TX_2
T46
PEG_TX_3
N50
PEG_TX_4
R51
PEG_TX_5
U43
PEG_TX_6
W42
PEG_TX_7
Y47
PEG_TX_8
Y39
PEG_TX_9
AC38
PEG_TX_10
AD47
PEG_TX_11
AC50
PEG_TX_12
AD43
PEG_TX_13
AG39
PEG_TX_14
AE50
PEG_TX_15
AH43
L_CTRL_CLK
E39
L_CTRL_DATA
E40
L_DDC_CLK
C37
L_DDC_DATA
D35
L_VDD_EN
K40
LVDS_IBG
L41
LVDS_VBG
L43
LVDS_VREFH
N41
LVDS_VREFL
N40
LVDSA_CLK#
D46
LVDSA_CLK
C45
LVDSA_DATA#_0
G51
LVDSA_DATA#_1
E51
LVDSA_DATA#_2
F49
LVDSA_DATA_1
E50
LVDSA_DATA_2
F48
LVDSB_CLK#
D44
LVDSB_CLK
E42
LVDSB_DATA#_0
G44
LVDSB_DATA#_1
B47
LVDSB_DATA#_2
B45
LVDSB_DATA_1
A47
LVDSB_DATA_2
A45
L_BKLT_EN
H39
TVA_DAC
E27
TVB_DAC
G27
TVC_DAC
K27
TVA_RTN
F27
TVB_RTN
J27
TVC_RTN
L27
CRT_BLUE
H32
CRT_BLUE#
G32
CRT_DDC_CLK
K33
CRT_DDC_DATA
G35
CRT_GREEN
K29
CRT_GREEN#
J29
CRT_HSYNC
F33
CRT_TVO_IREF
C32
CRT_RED
F29
CRT_RED#
E29
CRT_VSYNC
E33
LVDSA_DATA_0
G50
LVDSB_DATA_0
E44
L_BKLT_CTRL
J40
TV_DCONSEL_0
M35
TV_DCONSEL_1
P33
C149
0.1U/10V
C149
0.1U/10V
1
2
C116
0.1U/10V
C116
0.1U/10V
1
2
R488
20/F
R488
20/F
1
2
C151
0.1U/10V
C151
0.1U/10V
1
2
C139
0.1U/10V
C139
0.1U/10V
1
2
C126
0.1U/10V
C126
0.1U/10V
1
2
C147
0.1U/10V
C147
0.1U/10V
1
2
T75
PAD T75
PAD
C702
2.2U/10V
C702
2.2U/10V
1
2
R450
24.9/F
R450
24.9/F
1
2
T78
PAD T78
PAD
C115
0.1U/10V
C115
0.1U/10V
1
2
C123
0.1U/10V
C123
0.1U/10V
1
2
R472
0_NC
R472
0_NC
1
2
T23 PAD
T23 PAD
T81
PAD T81
PAD
C698
0.01U/25V
C698
0.01U/25V
1
2
C119
0.1U/10V
C119
0.1U/10V
1
2
C140
0.1U/10V
C140
0.1U/10V
1
2
R474
0
R474
0
1
2
C696
0.01U/25V
C696
0.01U/25V
1
2
R499
3.01K/F
R499
3.01K/F
1
2
R446
4.02K/F_NC
R446
4.02K/F_NC
1
2
C166
0.1U/10V
C166
0.1U/10V
1
2
T70
PAD T70
PAD
C124
0.1U/10V
C124
0.1U/10V
1
2
T24 PAD
T24 PAD
C120
0.1U/10V
C120
0.1U/10V
1
2
C118
0.1U/10V
C118
0.1U/10V
1
2
T22 PAD
T22 PAD
C113
0.1U/10V
C113
0.1U/10V
1
2
C127
0.1U/10V
C127
0.1U/10V
1
2
R469
392/F
R469
392/F
1
2
C161
0.1U/10V
C161
0.1U/10V
1
2
C128
0.1U/10V
C128
0.1U/10V
1
2
R494
1K/F
R494
1K/F
1
2
R453
4.02K/F_NC
R453
4.02K/F_NC
1
2
T26 PAD
T26 PAD
T72
PAD T72
PAD
C154
0.1U/10V
C154
0.1U/10V
1
2
T82
PAD T82
PAD
R456
56
R456
56
1
2
C125
0.1U/10V
C125
0.1U/10V
1
2
R440
4.02K/F_NC
R440
4.02K/F_NC
1
2
R216
20/F
R216
20/F
1
2
C163
0.1U/10V
C163
0.1U/10V
1
2
R471
100
R471
100
1
2
C112
0.1U/10V
C112
0.1U/10V
1
2
C172
0.1U/10V
C172
0.1U/10V
1
2
T80
PAD T80
PAD
C122
0.1U/10V
C122
0.1U/10V
1
2
R455
4.02K/F_NC
R455
4.02K/F_NC
1
2
R498
1K/F
R498
1K/F
1
2
C169
0.1U/10V
C169
0.1U/10V
1
2
PM
MISC
NC
DDR MUXING
CLK
DMI
CFG
RSVD
GRAPHICS VID
ME
U12B
CRESTLINE_1p0
PM
MISC
NC
DDR MUXING
CLK
DMI
CFG
RSVD
GRAPHICS VID
ME
U12B
CRESTLINE_1p0
SM_CK_0
AV29
SM_CK_1
BB23
RSVD28
BF23
SM_CK_3
BA25
SM_CK#_0
AW30
SM_CK#_1
BA23
RSVD29
BG23
SM_CK#_3
AW25
SM_CKE_0
BE29
SM_CKE_1
AY32
SM_CKE_3
BD39
SM_CKE_4
BG37
SM_CS#_0
BG20
SM_CS#_1
BK16
SM_CS#_2
BG16
SM_CS#_3
BE13
RSVD34
BH39
SM_ODT_0
BH18
SM_ODT_1
BJ15
SM_ODT_2
BJ14
SM_ODT_3
BE16
SM_RCOMP
BL15
SM_RCOMP#
BK14
SM_VREF_0
AR49
SM_VREF_1
AW4
CFG_18
L32
CFG_19
N33
CFG_2
N24
CFG_0
P27
CFG_1
N27
CFG_20
L35
CFG_3
C21
CFG_4
C23
CFG_5
F23
CFG_6
N23
CFG_7
G23
CFG_8
J20
CFG_9
C20
CFG_10
R24
CFG_11
L23
CFG_12
J23
CFG_13
E23
CFG_14
E20
CFG_15
K23
CFG_16
M20
CFG_17
M24
PM_BM_BUSY#
G41
PM_EXT_TS#_0
L36
PM_EXT_TS#_1
J36
PWROK
AW49
RSTIN#
AV20
DPLL_REF_CLK
B42
DPLL_REF_CLK#
C42
DPLL_REF_SSCLK
H48
DPLL_REF_SSCLK#
H47
DMI_RXN_0
AN47
DMI_RXN_1
AJ38
DMI_RXN_2
AN42
DMI_RXN_3
AN46
DMI_RXP_0
AM47
DMI_RXP_1
AJ39
DMI_RXP_2
AN41
DMI_RXP_3
AN45
DMI_TXN_0
AJ46
DMI_TXN_1
AJ41
DMI_TXN_2
AM40
DMI_TXN_3
AM44
DMI_TXP_0
AJ47
DMI_TXP_1
AJ42
DMI_TXP_2
AM39
DMI_TXP_3
AM43
RSVD10
AR37
RSVD12
AL36
RSVD11
AM36
RSVD13
AM37
RSVD22
BJ20
RSVD23
BK22
RSVD24
BF19
RSVD25
BH20
RSVD26
BK18
PM_DPRSTP#
L39
SM_CK_4
AV23
SM_CK#_4
AW23
RSVD30
BC23
RSVD31
BD24
RSVD35
AW20
RSVD36
BK20
RSVD5
AR12
RSVD6
AR13
RSVD7
AM12
RSVD8
AN13
RSVD1
P36
RSVD2
P37
RSVD3
R35
RSVD4
N35
GFX_VID_0
E35
GFX_VID_1
A39
GFX_VID_2
C38
GFX_VID_3
B39
GFX_VR_EN
E36
RSVD27
BJ18
SM_RCOMP_VOH
BK31
SM_RCOMP_VOL
BL31
THERMTRIP#
N20
DPRSLPVR
G36
RSVD9
J12
CL_CLK
AM49
CL_DATA
AK50
CL_PWROK
AT43
CL_RST#
AN49
CL_VREF
AM50
RSVD37
C48
RSVD38
D47
RSVD39
B44
RSVD40
C44
RSVD32
BJ29
RSVD33
BE24
RSVD21
B51
NC_1
BJ51
NC_2
BK51
NC_3
BK50
NC_4
BL50
NC_5
BL49
NC_6
BL3
NC_7
BL2
NC_8
BK1
NC_9
BJ1
NC_10
E1
NC_11
A5
NC_12
C51
NC_13
B50
NC_14
A50
NC_15
A49
SDVO_CTRL_CLK
H35
SDVO_CTRL_DATA
K36
CLK_REQ#
G39
RSVD14
D20
ICH_SYNC#
G40
RSVD20
H10
RSVD41
A35
RSVD42
B37
RSVD43
B36
RSVD44
B34
RSVD45
C34
PEG_CLK#
K45
PEG_CLK
K44
TEST_1
A37
NC_16
BK2
TEST_2
R32
R449
10K
R449
10K
1
2
C173
0.1U/10V
C173
0.1U/10V
1
2
R448
4.02K/F_NC
R448
4.02K/F_NC
1
2
C129
0.1U/10V
C129
0.1U/10V
1
2
C114
0.1U/10V
C114
0.1U/10V
1
2
C117
0.1U/10V
C117
0.1U/10V
1
2
T76
PAD T76
PAD
C159
0.1U/10V
C159
0.1U/10V
1
2
R442
0
R442
0
1
2
R458
20K
R458
20K
1
2
T77
PAD T77
PAD
R468
1K/F
R468
1K/F
1
2
C663
0.1U/10V
C663
0.1U/10V
1
2
T73
PAD T73
PAD
T25
PAD T25
PAD
T79
PAD T79
PAD
T74 PAD
T74 PAD
R452
10K
R452
10K
1
2
C694
2.2U/10V
C694
2.2U/10V
1
2
