Quanta Computer JM7B-DISCRETE, Schematics

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Title
Size Document Number Rev
Date: Sheet of
QUANTA
COMPUTER
JM7B 2A
Thursday, September 14, 2006
Change list
5 3
Title
Size Document Number Rev
Date: Sheet of
QUANTA
COMPUTER
JM7B 2A
Thursday, September 14, 2006
Change list
5 3
Title
Size Document Number Rev
Date: Sheet of
QUANTA
COMPUTER
JM7B 2A
Thursday, September 14, 2006
Change list
5 3
JM7B
Item Page ECN Number Date Rev. Issue Description Solution Description Model Item Id
2A Sch X01: Update GPIOs
1. Swap PS_ID (ECE5018, pin 71) with ITP_DBRESET# (MEC5025, pin 55)
2. Move SB_WLAN_PCIE_RST# from ICH pin F18 to pin G11
3. Move SB_NB_PCIE_RST# from ICH pin C10 to pin F12
4. Move PLTRST_DELAY# MEC5025 pin 69 to ICH pin AF9
5. Move BEEP from ECE5018 pin 78 to MEC5025 pin 69
6. Move SIO_EXT_SCI# from ICH pin AG22 to ICH pin AC19
7. Connect ICH pin AG22 to LOM_SMBALERT#, add a 0-ohm series resistor
and depopulate, name the net LOM_ICH_SMBALERT#
8. Disconnect 3.3V_5V_SUS_PWRGD from MEC5025 pin 29
9. Move ALW_PWRGD_3V_5V from MEC5025 pin 18 to pin 29
10. Swap DOCK_SMB_PME# (MEC5025 pin 3) with DOCK_SMB_ALERT#
(ECE5018 pin 76)
12,13
,31,32,
44
WI88589
8/29/2006 39
Update GAIN table and populate R296,R549; depopulate R550,R297.
2A
Update GAIN settings / table to reflect MAX9789A production parts.Please
update the GAIN settings table on page 38 of the schematics to reflect what
is described in the MAX9789A specification. The table that is currently in the
schematic is for sample parts, not mass production. In additon, please
populate the parts for 15.6dB.
38 WI88586 8/29/2006 40
8/30/2006 31,32
DOCK_SMB_PME# should be pulled up to +3.3V_ALW
DOCK_SMB_ALERT# should be pulled up to +5V_ALW
Change R250 from 10 ohm to 10K ohm.
Dawson/Fila X00 Gerber board shows that resistor R250 on 3.3V reserved
discharge path violates Dell derating guideline (9E154 A03). The resistence
has to be increased to approriate value to meet the 70% power derating.
2A WI88965
53 8/30/2006
41
Change power rail with Q7 pin1 from +3.3V_WLAN to +3.3V_RUN. 2A
BJT Q7 should be pulled up to +3.3V_RUN as opposed to +3.3V_WLAN in
order to mimic LED behavior on M'07 systems.
36 WI88815 8/29/2006 42
Populate 330uF/6.3V to C327.
2A
Add 2nd 330uF bulk cap for WWAN connected to 3.3V_RUN. This is to help
provide enough power for the pulse loads during GPRS operation (max
current up to 3A for ~1 ms). Also would help in UMTS modes (more common)
where average draw is ~1 A.
29 WI88799 8/29/2006 43
Change PR96 to 10K ohm. 2A
Change PR96 value in charger ckt.Per Maxim's recommendation, change
the value of PR108 from 4.7k to 10k.
46 WI88815 8/29/2006 44
Change PC163 to 0.1uF/25V. 2A
Cnange value of PC163 on sheet 48.Per Intersil's recommendation, change
the value of PC163 from 1uF to 0.1uF.
48 WI88444
8/29/2006
9/4/2006
45
Done. PC209,PC208 to be populated in order to meet output ripple requirements. 2A WI82882 8/29/2006 47 46
On sheet 47 of Dawson Discrete, PC104 should connect to analog ground, not
power ground.
PC104 should connect to analog ground. 2A WI86924 8/29/2006 47 47
1) Only one 10uF input cap is needed, delete PC184
2) Only one 220uF output cap is needed, delete PC32, and change PC178 from
330uF to 220uF.
3) Change PC33 from 10uF to 0.1uF.
4) Change PC189 from 1uF to 0.1uF.
5) Depop PR208.
6) Add a 0.1uF cap to analog ground from pin 9, BYP.
6 Changes to 1.25V_RUN regulator on sheet 48. 2A WI88468 8/29/2006
9/1/2006 48 48
1) Only one input cap is needed, delete PC122.
2) PC121 can be deleted
3) PC129 can be changed from 330uF to 220uF
4) Change PC134 from 10uF to 0.1uF.
4 Changes to 1.5V_RUN regulator. 2A WI88476 8/29/2006 49 49
Done. PR125 no stuff.
There are two 1.5V_RUN_PWRGD pulled up to 3.3V_ALW on sheet 49 AND to
3.3V_SUS on sheet 44.
2A WI88182 8/29/2006 49 50
1) Delete "1.5V +/- 5%" note at top of page 50. Incorrect.
2) Better FETs will probably need to be chosen. Junction temperatures will
reach too high for FDS8880 and FDS6676AS.
Changes to VCC_GFX_CORE regulator. 2A WI88477
8/29/2006
9/8/2006
50 51
Done. Delete PQ52 ,PR229 and PR230. Chang PR217 to 24.9K , PR218 to 57.6K
and PR225 to 150K.
Proper setting for voltage dividers at +VCC_GFX_CORE.Regulated voltage at
+VCC_GFX_CORE should be 1.0 and 1.1V, depending on the state of
GFX_CORE_CNTRL. The current values of PR217 (2k), PR218 (3.4k), and
PR225 (75k) give calculated output values of 1.11 and 1.13V.
2A WI88174 8/29/2006 50 52
On sheet 51, Vcore regulator, change PR26 from NC to install (13K).
Add a cap, 2.2nF/0402_NC, in parallel with PC127, depopped.
Delete PR145.
Changes to Vcore circuit. 2A WI88154
8/29/2006
9/1/2006
51 53
1) Depop PR54 to change switching frequency from 500kHz to 300kHz.
2) 3.3V regulator needs another 10uF input cap to go along with PC65 and PC67.
3) One 330uF output cap will have its ripple rating exceeded, and ESR is too high
for 2% output ripple. Add another 330uF in parallel with PC68.
Changes to 3.3V_ALW regulator. 2A WI88472 8/29/2006 52 54
R223 should be changed to 100 ohm as you did on UMA version and It has
to be 0603.
Change R223 from 33 ohm to 100 ohm package 0603. 9/1/2006