1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A
A
B
B
C
C
D
D
ITP_TCK
ITP_TCK
ITP_TRST#
ITP_BPM#2
ITP_BPM#4
ITP_BPM#3
ITP_BPM#0
ITP_BPM#5
ITP_BPM#1
ITP_TCK
ITP_TDI
ITP_TMS
H_RESET#
ITP_DBRESET#
ITP_TDO
COMP3
COMP2
COMP1
COMP0
CPU_TEST4
CPU_TEST6
CPU_TEST1
CPU_TEST2
ITP_TRST#
CPU_TEST3
CPU_TEST5
H_D#[0..63]
H_D#22
H_D#26
H_D#25
H_D#16
H_D#19
H_D#23
H_D#29
H_D#20
H_D#21
H_D#17
H_D#28
H_D#18
H_D#30
H_D#27
H_D#24
H_D#31
CPU_TEST6
CPU_TEST2
V_CPU_GTLREF
CPU_TEST1
COMP3
COMP2
COMP1
COMP0
H_D#13
H_D#3
H_D#8
H_D#10
H_D#0
H_D#5
H_D#12
H_D#7
H_D#6
H_D#11
H_D#4
H_D#14
H_D#2
H_D#1
H_D#15
H_D#9
H_D#[0..63]
H_D#[0..63]
H_D#35
H_D#37
H_D#43
H_D#44
H_D#38
H_D#33
H_D#39
H_D#42
H_D#34
H_D#32
H_D#47
H_D#46
H_D#40
H_D#36
H_D#41
H_D#45
H_D#58
H_D#56
H_D#50
H_D#61
H_D#57
H_D#59
H_D#53
H_D#51
H_D#52
H_D#48
H_D#55
H_D#63
H_D#54
H_D#62
H_D#60
H_D#49
H_D#[0..63]
CPU_TEST3
CPU_TEST4
CPU_TEST5
H_PROCHOT#
H_REQ#[0..4]
H_A#11
H_A#8
H_REQ#4
H_A#6
H_A#9
H_A#5
H_REQ#1
H_A#3
H_A#14
H_A#16
H_REQ#0
H_A#13
H_A#[3..16]
H_A#15
H_A#4
H_A#7
H_REQ#3
H_A#10
H_A#12
H_REQ#2
H_THERMDA
H_THERMDC
ITP_TDO
ITP_DBRESET#
ITP_BPM#2
ITP_BPM#4
ITP_TRST#
ITP_TDI
ITP_BPM#3
ITP_TMS
ITP_BPM#0
ITP_TCK
ITP_BPM#5
ITP_BPM#1
H_A#34
H_THERMTRIP#
H_THERMDA
H_THERMDC
H_A#[17..35]
H_A#28
H_A#23
H_A#17
H_A#22
H_A#20
H_A#25
H_A#26
H_A#29
H_A#18
H_A#21
H_A#30
H_A#19
H_A#27
H_A#24
H_A#31
H_A#35
H_A#32
H_IERR#
H_A#33
H_THERMTRIP#
H_PROCHOT#
H_RESET#
CLK_CPU_ITP#
17
CLK_CPU_ITP
17
H_RESET# 5
H_DSTBP#0
5
H_D#[0..63]
5
H_D#[0..63]
5
H_DSTBP#3 5
H_DSTBN#3 5
H_DSTBP#2 5
H_DSTBN#2 5
H_DINV#2
5
H_DINV#3
5
H_D#[0..63]
5
H_D#[0..63]
5
H_DPSLP# 11
H_PSI# 51
CPU_MCH_BSEL0
6,17
CPU_MCH_BSEL1
6,17
CPU_MCH_BSEL2
6,17
H_DPRSTP# 6,11,51
H_DPWR#
5
H_PWRGOOD
11
H_CPUSLP# 5
H_DINV#0
5
H_DSTBN#0
5
H_DSTBP#1
5
H_DINV#1
5
H_DSTBN#1
5
H_A#[3..16]
5
H_REQ#[0..4]
5
H_ADSTB#0
5
H_A#[17..35]
5
H_ADSTB#1
5
H_FERR#
11
H_STPCLK#
11
H_INTR
11
H_NMI
11
H_SMI#
11
H_IGNNE#
11
H_A20M#
11
CLK_CPU_BCLK
17
CLK_CPU_BCLK#
17
H_THERMTRIP# 37
H_THERMDA 37
H_THERMDC
37
ITP_DBRESET# 13,32
H_LOCK# 5
H_BPRI# 5
H_BNR# 5
H_HIT# 5
H_DEFER#
5
H_RS#1 5
H_RS#2 5
H_RS#0 5
H_BR0# 5
H_DBSY#
5
H_DRDY#
5
H_INIT# 11
H_TRDY#
5
H_HITM# 5
H_ADS# 5
CPU_PROCHOT#
31
+1.05V_VCCP
+3.3V_SUS
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+3.3V_ALW
Title
Size
Document Number
Rev
Date:
Sheet
of
QUANTA
COMPUTER
JM7B
2A
Merom Processor (HOST BUS)
3
57
Thursday, September 14, 2006
Title
Size
Document Number
Rev
Date:
Sheet
of
QUANTA
COMPUTER
JM7B
2A
Merom Processor (HOST BUS)
3
57
Thursday, September 14, 2006
Title
Size
Document Number
Rev
Date:
Sheet
of
QUANTA
COMPUTER
JM7B
2A
Merom Processor (HOST BUS)
3
57
Thursday, September 14, 2006
Layout Note:
Place couple 0.1uF Decoupling
caps with in 0.1" ITP connector.
ITP700 layout guidelines
Signal
Resistor Value
Connect To Resistor Placement
Place the pull-up near CPU
VCCP
GND
GND
150 ohm ± 5%
39 ohm ± 1%
500 to 680
ohm ± 5%
27 ohm ± 1%
TDI
TMS
TRST#
TCK
TDO
Connect to TCK pin of CPU and then
connect it to FBO pin of ITP connector
in daisy chain. Place the pull-down
near TCK0 pin of ITP connector
Within 200ps of ITP connector
Connect to CPURST# pin of GMCH through
the series resistor placed within
200ps of ITP connector. Place the
pull-up after the series resistor from
ITP connector.
Comp0,2 connect with Zo=27.4ohm,Comp1,3
connect with Zo=55ohm, make those traces
length shorter than 0.5".Trace should be
at least 25 mils away from any other
toggling signal.
Place C close to the
CPU_TEST4 pin. Make sure
CPU_TEST4 routing is
reference to GND and away
from other noisy signal.
Layout Note:
Place voltage
divider within
0.5" of GTLREF
pin
Layout Note:
Place R8 close ITP.
For the purpose of testability, route these signals
through a ground referenced Z0 = 55ohm trace that
ends in a via that is near a GND via and is
accessible through an oscilloscope connection.
Populate ITP700Flex for bringup
VCCP
VCCP
Place the pull-down near CPU
51 ohm ± 5%
Place the pull-up near ITP
22.6 ohm ± 1%
series resistor
and pullup 51
ohm ± 1%.
RESET#
VCCP
Layout Note:
Place R646
close to
CPU.
0
0
1
1
1
533
0
0
166
1
200
133
BSEL2
BSEL1
BSEL0
667
FSB
800
BCLK
0
Note:
H_DPRTSTP need to daisy chain
from ICH8 to IMVP6 to CPU.
Voltage Level shift
14
DATA GRP 0
DATA GRP 1
DATA GRP 2
DATA GRP 3
MISC
U7B
Merom Ball-out Rev 1a
DATA GRP 0
DATA GRP 1
DATA GRP 2
DATA GRP 3
MISC
U7B
Merom Ball-out Rev 1a
COMP[0]
R26
COMP[1]
U26
COMP[2]
AA1
COMP[3]
Y1
D[0]#
E22
D[1]#
F24
D[10]#
J24
D[11]#
J23
D[12]#
H22
D[13]#
F26
D[14]#
K22
D[15]#
H23
D[16]#
N22
D[17]#
K25
D[18]#
P26
D[19]#
R23
D[2]#
E26
D[20]#
L23
D[21]#
M24
D[22]#
L22
D[23]#
M23
D[24]#
P25
D[25]#
P23
D[26]#
P22
D[27]#
T24
D[28]#
R24
D[29]#
L25
D[3]#
G22
D[30]#
T25
D[31]#
N25
D[32]#
Y22
D[33]#
AB24
D[34]#
V24
D[35]#
V26
D[36]#
V23
D[37]#
T22
D[38]#
U25
D[39]#
U23
D[4]#
F23
D[40]#
Y25
D[41]#
W22
D[42]#
Y23
D[43]#
W24
D[44]#
W25
D[45]#
AA23
D[46]#
AA24
D[47]#
AB25
D[48]#
AE24
D[49]#
AD24
D[5]#
G25
D[50]#
AA21
D[51]#
AB22
D[52]#
AB21
D[53]#
AC26
D[54]#
AD20
D[55]#
AE22
D[56]#
AF23
D[57]#
AC25
D[58]#
AE21
D[59]#
AD21
D[6]#
E25
D[60]#
AC22
D[61]#
AD23
D[62]#
AF22
D[63]#
AC23
D[7]#
E23
D[8]#
K24
D[9]#
G24
TEST5
AF1
DINV[0]#
H25
DINV[1]#
N24
DINV[2]#
U22
DINV[3]#
AC20
DPRSTP#
E5
DPSLP#
B5
DPWR#
D24
DSTBN[0]#
J26
DSTBN[1]#
L26
DSTBN[2]#
Y26
DSTBN[3]#
AE25
DSTBP[0]#
H26
DSTBP[1]#
M26
DSTBP[2]#
AA26
DSTBP[3]#
AF24
GTLREF
AD26
PSI#
AE6
PWRGOOD
D6
SLP#
D7
TEST3
C24
BSEL[0]
B22
BSEL[1]
B23
BSEL[2]
C21
TEST2
D25
TEST4
AF26
TEST6
A26
TEST1
C23
R421
51/F_NC
R421
51/F_NC
1
2
R663
0
R663
0
1
2
R392
54.9/F
R392
54.9/F
1
2
T58
PAD T58
PAD
R382
1K/F
R382
1K/F
1
2
T21
PAD T21
PAD
C4
0.1U/10V
C4
0.1U/10V
1
2
C111
2200P/50V_NC
C111
2200P/50V_NC
1
2
R10
150
R10
150
1
2
R390
27.4/F
R390
27.4/F
1
2
Q62
2N7002W-7-F_NC
Q62
2N7002W-7-F_NC
2
3
1
R381
2K/F
R381
2K/F
1
2
R416
56
R416
56
1
2
C442
0.1U/10V_NC
C442
0.1U/10V_NC
1
2
R425
56
R425
56
1
2
R6
0
R6
0
1
2
ADDR GROUP
0
ADDR GROUP
1
CONTROL
XD
P/
IT
P SI
G
N
A
L
S
H CLK
THERMAL
R
ESER
VED
ICH
U7A
Merom Ball-out Rev 1a
ADDR GROUP
0
ADDR GROUP
1
CONTROL
XD
P/
IT
P SI
G
N
A
L
S
H CLK
THERMAL
R
ESER
VED
ICH
U7A
Merom Ball-out Rev 1a
A[10]#
N3
A[11]#
P5
A[12]#
P2
A[13]#
L2
A[14]#
P4
A[15]#
P1
A[16]#
R1
A[17]#
Y2
A[18]#
U5
A[19]#
R3
A[20]#
W6
A[21]#
U4
A[22]#
Y5
A[23]#
U1
A[24]#
R4
A[25]#
T5
A[26]#
T3
A[27]#
W2
A[28]#
W5
A[29]#
Y4
A[3]#
J4
A[30]#
U2
A[31]#
V4
RSVD[01]
M4
RSVD[02]
N5
RSVD[03]
T2
RSVD[04]
V3
RSVD[05]
B2
RSVD[06]
C3
RSVD[07]
D2
RSVD[08]
D22
A[4]#
L5
A[5]#
L4
A[6]#
K5
A[7]#
M3
A[8]#
N2
A[9]#
J1
A20M#
A6
ADS#
H1
ADSTB[0]#
M1
ADSTB[1]#
V1
RSVD[09]
D3
BCLK[0]
A22
BCLK[1]
A21
BNR#
E2
BPM[0]#
AD4
BPM[1]#
AD3
BPM[2]#
AD1
BPM[3]#
AC4
BPRI#
G5
BR0#
F1
DBR#
C20
DBSY#
E1
DEFER#
H5
DRDY#
F21
FERR#
A5
HIT#
G6
HITM#
E4
IERR#
D20
IGNNE#
C4
INIT#
B3
LINT0
C6
LINT1
B4
LOCK#
H4
PRDY#
AC2
PREQ#
AC1
PROCHOT#
D21
REQ[0]#
K3
REQ[1]#
H2
REQ[2]#
K2
REQ[3]#
J3
REQ[4]#
L1
RESET#
C1
RS[0]#
F3
RS[1]#
F4
RS[2]#
G3
SMI#
A3
STPCLK#
D5
TCK
AC5
TDI
AA6
TDO
AB3
THERMTRIP#
C7
THERMDA
A24
THERMDC
B25
TMS
AB5
TRDY#
G2
TRST#
AB6
A[32]#
W3
A[33]#
AA4
A[34]#
AB2
A[35]#
AA3
RSVD[10]
F6
T69
PAD
T69
PAD
R7
51
R7
51
1
2
R415
56
R415
56
1
2
C3
0.1U/10V
C3
0.1U/10V
1
2
R3
39/F
R3
39/F
1
2
R419
1K/F_NC
R419
1K/F_NC
1
2
R423
0_NC
R423
0_NC
1
2
R5
27/F
R5
27/F
1
2
R424
1K/F_NC
R424
1K/F_NC
1
2
R401
54.9/F
R401
54.9/F
1
2
R9
51/F
R9
51/F
1
2
R420
2.2K_NC
R420
2.2K_NC
1
2
R4
649/F
R4
649/F
1
2
R8
22.6/F
R8
22.6/F
1
2
R2
150
R2
150
1
2
JITP1
ITP700Flex_NC
JITP1
ITP700Flex_NC
NC0
4
NC1
6
GND0
10
GND1
14
GND2
16
GND3
18
GND4
20
GND5
22
BPM0#
23
BPM1#
21
BPM2#
19
BPM3#
17
BPM4#
15
BPM5#
13
DBR#
25
DBA#
24
VTT0
27
VTT1
28
VTAP
26
TDI
1
TMS
2
TCK
5
TDO
7
TRST#
3
RESET#
12
FBO
11
BCLKN
8
BCLKP
9
GND_0
29
GND_1
30
R403
27.4/F
R403
27.4/F
1
2