5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Title
Size
Document Number
Rev
Date:
Sheet
of
QUANTA
COMPUTER
JM7B
2A
Thursday, September 14, 2006
Change list
5
1
Title
Size
Document Number
Rev
Date:
Sheet
of
QUANTA
COMPUTER
JM7B
2A
Thursday, September 14, 2006
Change list
5
1
Title
Size
Document Number
Rev
Date:
Sheet
of
QUANTA
COMPUTER
JM7B
2A
Thursday, September 14, 2006
Change list
5
1
Item
Page
ECN Number
Date
Rev.
Issue Description
Solution Description
Model
JM7B
Item Id
1
13
WI82177
2A
SIO_EXT_SMI# Pull-up to Wrong Voltage Rail.
SIO_EXT_SMI# pull-up is on 3.3V_ALW. This pull-up should be connected to
3.3V_SUS. This should prevent potential back-drive.
Done.
7/28/2006
2
32
8/1/2006
WI83371
2A
Sch X00 - Change Board ID Straps for X01.
Populate R227 and depopulate R228 for Discrete.
3
12,23
,33
8/3/2006
WI83995
2A
Add S-Video in place of single USB port.
Remove single USB port on page 33 and related USB trace on page 12.
Add S-Video schematic on page 23.
WI83867
LCD_SMBCLK and LCD_SMBDAT rise time over spec. 1us.We need to remove
C74, C75 for Discrete to meet SM Bus rise time Spec.
8/4/2006
4
X00 SM Bus EA issue
24
2A
1,23
8/4/2006
Disenable SPDIF function for S-Video.
Add S-Video block to page 1.
Done.
6
24
Because Fairchild will change production material we change Q57 from
FDC653N_NL to SI3456DV-T1-E3. SI3456DV-T1-E3 have been used by Brewster for
second source.
Change MOSFET Q57 due to EOL.
7/28/2006
2A
N/A
7
Because Fairchild will change production material we change Q12,Q58 from
FDC658P_NL to FDC658AP.
Change MOSFET Q12,Q58 due to EOL.
24,33
2A
N/A
Because Fairchild will change production material we change PQ3,PQ34,Q50
from FDS6679 to FDS6679AZ.
Change MOSFET PQ3,PQ34,Q50 due to EOL.
8
2A
43,45
,54
N/A
7/28/2006
7/28/2006
Because Fairchild will change production material we change PQ23,PQ29 from
FDS4935 to SI4973DY-T1-E3.SI4973DY-T1-E3 have been used by Brewster for
second source.
Change MOSFET PQ23,PQ29 due to EOL.
5
2A
45
N/A
8/4/2006
Modify PQ49 on Discrete.
1.25V high side fet and low side fet should be overturn.For FDS6982S, the Q1
of the package is optimized for the high-side, and the Q2 is optimized for the
low-side.
2A
9
8/8/2006
48
WI84718
Done.
For the ALWON issue ,PR68 on Dis should be change to 0.47uF cap. PC214
instead of PR68.
2A
11
WI84734
52
8/8/2006
Add PR253 and PR254 on Dis.
Pin 29 of MAX8778 should add a resister to GND since MAX8778 has 5V OVP
issue on skip mode.Please refer to attachment from MAXIM.If add a 0 ohm
resister on pin29 of MAX8778 ,then we can change to ultrasonic mode.
2A
12
WI84737
8/8/2006
48
Done.
Since "GFX_PWR_SRC" net name on page 50 the same as page24. Change
"GFX_PWR_SRC" net name to "GFX_CORE_PWR_SRC" on page50.
2A
WI84745
8/8/2006
50
13
Add 10K termination resistors R654,R655,R656 to GPIO13,GPIO33,GPIO34 and
pull up to +3.3V_SUS on page 11.
Add 10K termination resistors R658 for GPIO12;R657 for GPIO27;R660 for GPIO26
;R661 for GPIO24;R659 for GPIO10 and pull up to +3.3V_SUS on page 13.
All unused GPIs on the ICH8 need to be terminated by a pull-up. Feedback
from Intel advises that all unused GPIs on the ICH8 need to be terminated
with a 8.2k - 10k ohm resistor pulled up to their corresponding volatage
rails.
2A
WI81395
8/9/2006
10
11,13
Change the power rail of ITP_DBRESET# to +3.3V_SUS for
back-drive.SIO_EXT_SMI have been corrected with power rail by WI82177.
Dawson 3VSUS back drive under S4, S5.
After check Dawson (UMA and Discrete) 3VSUS back drive under S4, S5.
There are two signal (ITP_DBRESET and SIO_EXT_SMI) need change pull up
from 3V_ALW to 3VSUS.These changes need implement into UMA and
Discrete both.
2A
WI82350
8/10/2006
14
3
Add pullup R662 on BC_DAT to +3.3V_ALW.
Change R526 from 10K to 100K and no stuff.
Per SMSC, need to have pull-ups for BC Bus Data lines.
1. Add a 100k ohm pullup to +3.3V_ALW on the BC Bus Data line for the
high speed BC Bus (pin 86) of the MEC5025. This is needed if the BC Bus is
ever operated slower than the 12MHz that we currently operate at.
2. Add a No Stuffed 100k ohm pullup to +3.3V_ALW on the low speed BC
Bus Data line for the low speed BC Bus (pin 39) of the MEC5025. There is an
internal pullup in the MEC, but since this BC Bus is mulitplexed with the
KBC pins, a pad for this resistor is recommended.
2A
WI82765
8/10/2006
31,34
15
Add 10k termination resistor to GPIO9 pulled up to +3.3V_SUS on page 13 /
Depop R654, R655, R656, R657, R660, R661 since default state of these pins
are GPO.
Done.
11,13
8/16/2006
Change U43 from SST25LF080A to SST25VF016B.
SCH X01 - Dawson/Fila PT build needs to use 2MB flash part. Due to
increase in number of payloads the BIOS is carrying, we need to move to a
2MB SPI flash part for the PT builds.
2A
8/16/2006
16
WI85788
34
Change pullup rail from +5V_ALW to +5V_ALW2 for the following resistors -
PR86, PR74, PR84,PR57,PR245 and PR231.
Due to the +15V_ALW rail going high before the +5V_ALW rail, the enable
circuit for multiple switched fets needs to change, to prevent unwanted
glitches from occurring.
2A
8/16/2006
17
WI85909
48,53
Change from MAX8778 to ISL6236.
2A
8/21/2006
WI85916
48,52
18
Change PU11 from MAX8778 to ISL6236, PR211 to 0 ohm on sheet 48.
Change PU4 from MAX8778 to ISL6236, PR58 to 0 ohm ;depop PR51;depop PR52
on page 52.
Pullup is at reference designator R198.
WI86681
19
Change pull-up rail on 5V_CAL_SIO1# to +3.3V_SUS.
Feedback from SMSC has indicated that the pull-up rail on 5V_CAL_SIO1#
needs to change from +5V_SUS to +3.3V_SUS.This is necessary because the
GPIO on the EMC4001 is 3V tolerant, not 5V.
2A
8/21/2006
37
