QCX assembly Rev 1.08
106
5.2
Circuit diagram
The complete circuit diagram (schematic) is shown on the previous page.
5.3
Synthesised oscillator
I always start with building the VFO of a radio. It was the hardest thing to get right. How to get that
analogue LC-tuned VFO accurate, free of drift, free of chirp, tuning over the required range, and
with mechanical gearing to be able to make fine frequency adjustments? A real challenge. Not any
more! Now we have Direct Digital Synthesis (DDS) ICs and Digital Phase Locked Loop (PLL) ICs,
inexpensive and easy to use, that solve all the problems.
The Si5351A Synthesiser chip used in this
design provides three separate frequency
outputs, with a frequency range spanning
3.5kHz to 200MHz. The frequency stability is
governed by the 27MHz crystal reference. Pretty
stable, in other words.
The block diagram (right) is taken from the
SiLabs Si5351A datasheet. Briefly, the 27MHz
reference oscillator is multiplied up to an internal
Voltage Controlled Oscillator in the range 600-900MHz (the PLL), then divided down to produce
the final output frequency. The multiplication up and the division own are both fractional and so the
frequency resolution is extremely finely controlled. The chip has two PLLs and three output divider
units.
For best jitter performance, the Si5351A datasheet recommends the use of even integer dividers
(no fractional component) in the MultiSynth dividers and in this CW transceiver design, this
recommendation is followed.
The synthesiser section of the circuit
diagram is shown here (right). The
Si5351A datasheet dictates the use of
a 25 or 27MHz crystal. QRP Labs has
always used the 27MHz crystal in our
designs because it allowed us to obtain
precise 1.46Hz tone spacing for WSPR
transmissions all the way up to the 2m
amateur band (145MHz). Those
calculations don’t work out with the
25MHz crystal. This requirement
doesn’t apply to this CW transceiver
design but economics of scale means there are advantages to sticking with the same component
values, all other things being equal!
The Si5351A has a large number of internal 8-bit registers to control the synthesiser behaviour,
and these are programmed by the microcontroller using the I2C serial protocol. 1K resistors R3
and R4 are pull-ups required for the operation of the bus at 400kHz.
Summary of Contents for QCX 5W CW
Page 9: ...QCX assembly Rev 1 08 9...
Page 10: ...QCX assembly Rev 1 08 10...
Page 12: ...QCX assembly Rev 1 08 12...
Page 50: ...QCX assembly Rev 1 08 50...
Page 105: ...QCX assembly Rev 1 08 105...
