Hardware Configuration
PEB-4700 User’s Manual
2-2
2.1 Jumper
Setting
PEB-4700VLA Jumper & Connector Location
CN12
CN13
CN18
CN15
CN17
JP4
CN19
CN22
CN20
CN23
CN7
CN21
CN9
JP3
CN16
CN24
SYSTEM-FAN
CPU-FAN
AUTO POWER ON
LAN-LED
USB4/5
DIMM1
LINE-OUT
CD-IN
IDE2
IDE1
FLOPPY
-PW LED
LOCK
PW ON
SPKR
+HDLED RESET
ECN RECORD
LVDS-CONN
COM4
CN8
CN5
CN2
CN1
93008
EXT. KB/MS
KB/MS
COM1
VGA
LPT1
CN3
CN6
LA
N
US
B
0/1
U
SB
2/3
139
4
CN4
PCI +RISER
CN11
COM2
CN10
COM3
BATT1
CF II
SOCKET
CLEAR CMOS
JP5
JP2
LCD VCC
BIOS W/P
PEB-4700ZVLA onboard Celeron
®
M 600MHz without L2 cache processor.
So the board layout has not the socket of CPU.
In order to set up the correct configuration, here is the description about how to set
the jumpers to enable/disable or change functions. All jumpers’ location please refer
to jumper location diagram.
JP2 : LVDS Voltage Setting Select
JP2
Function
1-2
3.3V
Ì
2-3 5V