3.
PEX 8112RDK-F Hardware Architecture
Figure 3. PEX 8112RDK-F Hardware Architecture
3.1
PEX 8112 PCI Express Bridge Device
The PEX 8112 is a high-performance bridge, designed to the
PCI Express-to-PCI Bridge Specification 1.0
, that
enables designers to migrate legacy PCI Bus interfaces to the new, advanced serial PCI Express. This 2-port
device is equipped with a single-lane PCI Express port and a parallel bus segment supporting Conventional PCI
operation. The PEX 8112 is capable of operating in Forward and Reverse Bridging modes. The PEX 8112 bridge
device is housed in a 13 x 13 mm, 144-ball PBGA package. Ball spacing is 1.0 mm. No additional cooling is
required.
3.2
Serial EEPROM
The PEX 8112 bridge device has an SPI serial EEPROM, which can be used to load configuration data from a
serial EEPROM on power-up. However, a serial EEPROM is not needed to bring up the PEX 8112. This interface
is connected to an 8-pin DIP socket (U3), which houses the serial EEPROM. A pull-up resistor (R3) on the
EERDDATA ball produces a value of FFh if there is no serial EEPROM installed.
The PEX 8112 supports up to 16-MB serial EEPROMs, utilizing 1, 2, or 3-byte addressing. The PEX 8112
automatically determines the appropriate addressing mode. The SPI operates at up to 25 MHz and can directly
interface with the PEX 8112. The Atmel AT25640 device is recommended. Other compatible 128-byte serial
EEPROMs include the Atmel AT25010A, Catalyst CAT25C01, and ST Microelectronics M95010W.
PEX 8112RDK-F Hardware Reference Manual for Board Revision 1.0, Version 1.1
4
© 2008, PLX Technology, Inc. All rights reserved.
