Pleora Technologies iPort NTx-Pro, Hardware Manual, Page: 34 / 52

30 Pixel Bus Timing
Copyright © 2010 Pleora Technologies Inc.
Case 1: FVAL and LVAL are Level-sensitive
FVAL
LVAL
DVAL
t
FV2LV
t
FV2DV
t
LI2LV
t
FI2FV
t
FI2DV
t
LV2LI
t
LI2DV
PIXEL_DATA x
(1,1)
(N-1,
M)
(0,0) (N,0) (1,0)
(N-1,
0)
(0,0) (1,0) (0,1) (N,M)
Don’t Care Window Size = N x M
t
LV2DV
t
DI2LI
t
DI2FI
t
LI2FI
t
FV2FI
t
FV2FV
t
LLI2DV
Case 2: FVAL and LVAL are Edge-sensitive
(1,0)
(N-1,
0)
t
LI2LV
FVAL
LVAL
DVAL
t
FV2LV
t
FI2FV
t
LV2LI
(1,1)
(N-1,
M)
PIXEL_DATA x
(0,0) (N,0) (0,0) (1,0) (0,1) (N,M)
Don’t Care Window Size = N x M
t
FV2DV
t
LV2DV
t
FV2FV
t
FV2FI
Case 3: FVAL is Edge-sensitive and LVAL is Level-sensitive
(1,0)
(N-1,
0)
t
LI2LV
FVAL
LVAL
DVAL
t
FV2LV
t
FI2FV
t
LV2LI
(1,1)
(N-1,
M)
PIXEL_DATA x
(0,0) (N,0) (0,0) (1,0) (0,1) (N,M)
Don’t Care Window Size = N x M
t
FV2DV
t
LV2DV
t
LI2DV
t
DI2LI
t
LLI2DV
t
FV2FV
t
FV2FI