Pleora Technologies iPort NTx-Pro, Hardware Manual, Page: 33 / 52

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Copyright © 2010 Pleora Technologies Inc.
Pixel Bus Timing
The pixel bus of the NTx-Pro IP Engine carries image data in a format similar to deserialized Camera
Link Standard data.
Overview
PIXEL_CLK
PIXEL_DATA x
FVAL
DVAL
LVAL
SPR
t
CH
t
CL
t
CP
t
DS
t
DH
CC x
t
CCP
Sub-clock Delays on the Camera Interface
Parameter Symbol Minimum Maximum Notes
PIXEL_CLK high-level width t
CH
4.5 ns typ.
PIXEL_CLK low-level width t
CL
4.5 ns typ.
PIXEL_CLK frequency f
CP
90 MHz
PIXEL_CLK clock period t
CP
11.0.ns
PIXEL_DATAx setup time t
DS
2 ns By design
PIXEL_DATAx hold time t
DH
2 ns By design
CCx pulse width t
CCP
30 ns Asynchronous with
respect to IN_CLK0 but
can be sampled using
OUT_CLKP
Camera Link Signals
The output of the camera must match the format of the NTx-Pro IP Engine. Select a case for your
application and then refer to, “Timing Values for All Cases” on page 31. The stated timing restrictions
are minimum values.