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Copyright © 2010 Pleora Technologies Inc.
Signal Names: (J4) 50-Pin FFC/FPC - Detail
The table below contains detailed descriptions of the signal names for the (J4) 50-Pin FFC/FPC.
Signal Names: (J4) 50-Pin FFC/FPC - Detail
Name
Pin No.
Type
Level
Description
2.5V
1, 2, 3
Power
Output
2.5V
2.5V power output to customer
circuitry. The current limitation is
0.4A for each pin; 0.9A in total.
GND
4, 9, 18, 27,
36, 45
Ground
Ground
VIN
5, 6
Power
Input/
Output
5 to 16V
5 to 16V; 5V recommended. Refer
to
IO25_PLL_P0
7
I/O
2.5V
Reserved
IO25_PLL_N0
8
I/O
2.5V
Reserved
IO25_0 -
IO25_32
10-17, 19-
26, 28-35,
37-44,
46
I/O
2.5V
FPGA I/Os
IO25_CLKBUF0
47
Hi-Z
High Impedance
Reserved
IO25_CLKBUF1
48
Hi-Z
High Impedance
Reserved
3.3V
49, 50
Power
Output
3.3V
3.3V power output to customer
circuitry. The current limitation is
0.4A for each pin; 1.0A in total.
IO33_0 - IO33_32 10-17,
19-26,
28-35,
37-44, 46
I/O
3.3V
FPGA I/Os
IO33_CLKBUF0
47
Reserved
Hi-Z
High Impedance
IO33_CLKBUF1
48
Input
3.3V
Pixel Bus input clock
Signal Names: (J5) 50-Pin FFC/FPC - Detail
Name
Pin No.
Type
Level
Description
Summary of Contents for iPort NTx-Pro
Page 1: ...NTx Pro Hardware Guide...
Page 2: ......
Page 3: ...proven performance...
Page 20: ...16 Connector Power Copyright 2010 Pleora Technologies Inc...
Page 30: ...Top View Side View 26 Mechanical OEM NTx Pro Copyright 2010 Pleora Technologies Inc...
Page 31: ...Top view Side view Top view 27 Copyright 2010 Pleora Technologies Inc...
Page 36: ...32 Pixel Bus Timing Copyright 2010 Pleora Technologies Inc...
Page 40: ...36 Serial Port Bulk Interface UART USRT and I2C Copyright 2010 Pleora Technologies Inc...
Page 42: ...38 Serial Port Standard Bandwidth UART Copyright 2010 Pleora Technologies Inc...
Page 46: ...42 Power Requirements Copyright 2010 Pleora Technologies Inc...
Page 51: ...47 Copyright 2010 Pleora Technologies Inc...
Page 52: ...48 Camera Link Pixel Bus Definitions Copyright 2010 Pleora Technologies Inc...