phyCORE-TriCore Development Board
12
©
PHYTEC Meßtechnik GmbH 2009 L-730e_0
2.
It is also possible to start the Bootstrap Loader via external signals
applied to the DB-9 socket P1A. This requires control of the signal
transition on the Reset line via pin 7 while a static low-level is
applied to pin 4 for the Boot signal.
Jumper Setting
Description
JP20
1 + 2
Pin 7 (CTS) of the DB-9 socket P1A as RESET signal
for the phyCORE-TC1130 or phyCORE-TC1796
2 + 3
Pin 7 (CTS) of the DB-9 socket P1A as BOOT signal
for the phyCORE-TC1130 or phyCORE-TC1796
open
(default)
function not used
JP21
1 + 2
Pin 4 (DSR) of the DB-9 socket P1A as BOOT signal
for the phyCORE-TC1130 or phyCORE-TC1796
2 + 3
Pin 4 (DSR) of the DB-9 socket P1A as RESET signal
for the phyCORE-TC1130 or phyCORE-TC1796
open
(default)
function not used
JP13
1 + 2
Low-level Boot signal connected with the BOOT input
of the phyCORE-TC1130 or phyCORE-TC1796
2 + 3
Jumper setting generates high-level on Boot input
of the phyCORE-TC1130 or phyCORE-TC1796
open
(default)
function not used
Table 2:
JP20, JP21, JP13 Configuration of Boot via RS-232
Caution:
JP20 and JP21 must have the same setting at any time:
JP20,JP21 = 1+2
or
JP20,JP21 = 2+3
