Circuit Descriptions, Abbreviation List, and IC Data Sheets
EN
8
4
TCM2.0E LA
9.
9.4.9
Diagram B, MX25L3205
Figure 9-10 Block diagram & pin configuration
Addre
ss
Gener
a
tor
Memory Arr
a
y
Y-Decoder
X-Decoder
a
ddition
a
l 4K
b
D
a
t
a
Regi
s
ter
S
RAM
B
u
ffer
S
I
C
S
#, ACC,
WP#,HOLD#
S
CLK
Clock Gener
a
tor
S
t
a
te
M
a
chine
Mode
Logic
S
en
s
e
Amplifier
HV
Gener
a
tor
O
u
tp
u
t
B
u
ffer
S
O
16-PIN SOP (300 mil)
1
2
3
4
5
6
7
8
HOLD#
VCC
NC
PO2
PO1
PO0
C
S
#
S
O/PO7
16
15
14
1
3
12
11
10
9
S
CLK
S
I
PO6
PO5
PO4
PO
3
GND
WP#/ACC
I_17950_05
3
.ep
s
09050
8
Block Dia
g
ram
Pin Confi
g
uration