Circuit Diagrams and PWB Layouts
65
TCM2.0E LA
7.
SSB v2: I/O VGA
GND
GND
GND
T
T
GND
T
T
T
S
DA
S
CL
WP
VCC
GND
A2
A1
A0
T
GND
GND
GND
GND
GND
T
T
T
T
T
T
T
T
T
GND
GND
GND
GND
A
1
2
3
4
5
6
7
8
F
E
D
C
B
A
8
7
6
5
4
3
2
1
F
E
D
C
B
Ne
a
rly 5
33
5
Ne
a
rly Connector
S
W_UPDATE_CTL1
R712
100R
22K
R71
8
R717
22K
2
1
R
8
5
EZJZ1V270RA
2
1
R
8
4
EZJZ1V270RA
2
1
R
8
2
EZJZ1V270RA
BLUE
GREEN
RED
2
1
R
8
0
EZJZ1V270RA
H
S
YNC_IN
1
2
EZJZ1V270RA
R
83
C701
1U
V
S
YNC
VGA
S
CL_IN
W/P_CTR
V
S
YNC_IN
H
S
YNC_IN
VGA
S
DA_IN
100R
R997
C71
3
0.01U
L91
8
3
0R
R99
8
0R
C712
4700P
R719
33
R
C714
0.01U
C715
16P
75R
R996
R701
100R
R70
3
100R
C706
0.01U
C707
0.01U
C709
0.01U
C710
0.01U
R720
33
R
C711
16P
75R
R999
L919
3
0R
R721
33
R
C70
8
16P
75R
R702
L920
3
0R
1
2
3
D91
3
BAV70
R716
0R
C005
E
S
D_0402
Z945
Z941
Z942
Z94
3
Z944
Z955
Z946
Z94
8
Z947
VGA_PLUGPWR
+5V
R707
10K
R706
10K
R705
10K
R704
10K
C999
470P
H
S
YNC
L921
3
0R
C705
10P
C704
10P
L922
3
0R
R714
10K
U0RX
U0TX
5V
S
B
5V
S
B
R71
3
100R
R725
10K
B
C
E
Q905
C14
3
ZT
VGA
S
CL_IN
B
C
E
Q904
C14
3
ZT
R709
100R
C99
8
16P
VGA
S
DA
R711
100R
5V
S
B
5V
S
B
R710
10K
Z970
5
6
7
8
4
3
2
1
U90
3
AT24C02
Z971
Z972
Z97
3
VGA
S
DA
VGA
S
CL
W/P
6
4
11
14
15
7
12
8
5
1
3
3
10
9
1
2
16
17
P90
8
VGA_L
VGA_R
5V
S
B
5V
S
B
C996
0.1U
VGA_PLUGPWR
VGA_PLUGPWR
R715
10K
B
C
E
Q90
3
C14
3
ZT
R70
8
10K
Z950
L924
3
0R
L92
3
3
0R
Z949
C997
16P
VGA
S
DA_IN
470P
C70
3
W/P
VGA_R_IN
VGA_L_IN
1U
C702
V
S
YNC_IN
2
1
R
8
1
EZJZ1V270RA
VGA
S
DA_IN
2
1
R
8
6
EZJZ1V270RA
VGA
S
CL_IN
VGA
S
CL
RP
S
OG
GP
GN
BP
RN
BN
RED
BLUE
GREEN
1795
3
_5
38
_090
33
0.ep
s
090
33
1
I/O - VGA
B18
B18