Circuit Diagrams and PWB Layouts
41
TCM2.0E LA
7.
SSB v1: I/O Scart
GND
GND
GND
GND
GND
T
T
T
T
T
GND
GND
T
T
T
T
T
T
GND
GND
GND
GND
GND
NEARLY MT5
33
5
Ne
a
rly Connector
Ne
a
rly 5
33
5
2
1
R62
EZJZ1V270RA
2
1
R60
EZJZ1V270RA
2
1
R67
EZJZ1V270RA
2
1
R6
8
EZJZ1V270RA
2
1
R66
EZJZ1V270RA
2
1
R65
EZJZ1V270RA
2
1
R64
EZJZ1V270RA
1U
C965
1
2
3
12
1
3
14
15
4
5
6
7
16
17
1
8
19
8
9
20
21
10
11
P1
PB0P
Y0N
S
TC1_FB_IN
S
CT1_R_IN
S
CT1_G_IN
S
CT1_F
S
_IN
Z927
Z922
Z924
S
CT1_AUL_OUT
S
CT1_AUR_IN
Z925
Z921
S
CT1_AUR_OUT
Z926
S
CT1_AUR_IN
S
CT1_AUL_IN
S
CART_F
S
_IN
R962
10K
R96
3
0R
S
CT1_AUL_OUT
S
CT1_AUR_OUT
L1
3
0R
S
CT1_AV_IN
Z91
8
Z919
Z920
Z92
8
S
OY0
S
C0
GND_
S
V
S
Y0
Y0P
PBR0N
PR0P
S
CT_R
S
CT_L
R977
6
8
R
C96
8
0.047U
R972
100R
75R
R96
8
C969
1U
C979
470P
L90
8
3
0R
L907
3
0R
C96
3
470P
C977
0.01U
L906
3
0R
C976
16P
75R
R976
R97
8
100R
R974
100R
C974
0.01U
R97
3
6
8
R
L905
3
0R
C97
3
16P
75R
R975
C972
0.01U
C971
0.01U
75R
R971
C970
16P
L904
3
0R
R969
6
8
R
R970
100R
L90
3
3
0R
C967
47P
R967
10K
R966
10K
C964
470P
R965
10K
R964
10K
L2
3
0R
R961
33
K
R960
75R
C975
0.01U
C97
8
0.047U
C9
8
0
470P
Z92
3
S
CT1_B_IN
S
CT1_AUL_IN
S
CT1_AV_OUT
C966
1U
1
2
EZJZ1V270RA
R6
3
S
CT1_AV_IN
S
TC1_FB_IN
S
CT1_F
S
_IN
2
1
R61
EZJZ1V270RA
S
CT1_G_IN
S
CT1_B_IN
S
CT1_R_IN
I/O -
S
CART
B15
B15
I_17950_0
3
5.ep
s
07050
8