88
LC4.9E AB
7.
Circuit Diagrams and PWB Layouts
SSB: Sync Interface
2
RE
S
I451 E9
8
44
3
7 B6
4
44
3
9 E2
3
45
3
B6
7
RE
S
B
5
3
1
I450 D
8
E
3
4
3
2 B
3
44
38
D2
I449 D
8
2
0V
3
V1
8
1
3
TO
S
IDE CONNECTOR
S
RE
S
C
D
D
C
74
3
0 B
3
244
8
E9
74
3
6-4 D4
S
YNC INTERFACE
I44
3
B5
9
I45
3
B
3
74
3
6-2 C7
3
4
3
1 A
3
4440 D2
4441 E2
4
6
54
3
1 E
8
3
462 E4
3
451 A5
3
45
8
D2
3
459 D4
3
454 B7
A
A
3
46
3
C4
1440 D9
6
44
3
6 A6
2449 E4
RE
S
&
3
455 C6
3
456 C7
B
FOR ITV ONLY
I452 E9
5
3
461 E2
1441 E9
74
3
6-6 E
3
2447 E
8
E
74
3
6-1 A6
I4
3
0 B
3
RE
S
74
3
6-5 E4
7
74
3
6-
3
D
3
64
3
0 A
3
64
3
1 B
3
RE
S
I440 C6
9
I454 B2
244
8
3
46
3
I440
4K7
3
451
+5V
S
W
1
3
7
14
12
74
3
6-6
74LVC14APW
+
3
V
3S
W
100R
3
455
5
7
14
6
74
3
6-
3
74LVC14APW
100R
3
459
3
4
3
1
1K0
BZX
38
4-C2V7
64
3
0
3
4
3
2
74
3
0
PDTC114ET
I4
3
0
+
3
V
3S
W
44
38
BM05B-
S
R
SS
-TBT
1
2
3
4
5
6
7
1440
2
3
456
100R
74
3
6-1
74LVC14APW
1
7
14
I44
3
2449
100n
4441
3
461
100R
3
45
3
100R
44
3
7
+5V
+
3
V
3S
W
7
14
4
10
74
3
6-2
74LVC14APW
3
11
7
14
74
3
6-5
74LVC14APW
2447
10p
5
I452
B
3
B-PH-
S
M4-TBT(LF)
1
2
3
4
+
3
V
3S
TBY
+
3
V
3S
TBY
1441
44
3
9
4440
I451
54
3
1
+
3
V
3S
W
64
3
1
1N414
8
+
3
V
3S
W
44
3
6
10p
+12V
S
W
I450
I449
I454
100R
3
462
14
8
+
3
V
3S
W
74
3
6-4
74LVC14APW
9
7
100R
3
45
8
I45
3
100R
3
454
S
C1_CVB
S
_RF_OUT
V
S
YNC
H_1FH
V
s
ync_
S
DTV
ITV_IR_
S
W_RE
S
ET
HOUT
COL_HREF
H_DELAY
V_1FH
COL_VA
LED_
S
EL
V
s
ync_
S
DTV
H
s
ync_
S
DTV
B
3
B
3
3
1
3
9 12
3
6141.1
G_15
3
51_00
3
.ep
s
0
8
0906