Patton electronics 2070 Series, User Manual

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Switches S1-1: Test Mode Activation
Use Switch S1-1 to enable or disable the Model 2070/Ax Test
Mode. When enabled, the Local Line and G.703 loopback tests
activate simultaneously. When disabled, the Model 2070/Ax functions
normally.
S1-1 Activation Description
On Enabled Local Loop and G.703 Loop
diagnostics enabled
Off Disabled Local Loop and G.703 Loop
diagnostics disabled
Switches S1-2 and S1-3: Clocking Mode
Use Switches S1-2 and S1-3 together to set the system clock for
the Model 2070/Ax. When using two Model 2070s together in a point-
to-point application as short range modems, set one unit for either
Internal or External transmit clock and the other unit to Network clock.
When connecting directly to the G.703 network, set the unit to Network
clock.
S1-2 S1-3 Clocking Description
On On Network The G.703 network
provides the system clock
On Off External The DTE provides the
system clock
Off On Internal The Model 2070/Ax
provides an internally
generated system clock
7
2070/Ax SWITCH S1 SUMMARY TABLE
Position Function Factory Default
S1-1 Test Mode Off Disabled
S1-2 Clock Mode On
S1-3 Clock Mode On
S1-4 Respond to LL Request On Disabled
}
Network
Clock
8
Switch S1-4: Response to DTE Request for Local Loopback
Use Switch S1-4 to enable the Model 2070/Ax to enter Local
Loopback mode when pin 18 from the V.24 interface is raised. In the
On position, the Local Loopback may only be enabled manually by
Switch S1-1.
S1-4 Activation Description
On Disabled Model 2070/Ax ignores DTE
requests to enter Local Loopback
Off Enabled Model 2070/Ax enters Local
Loopback Mode when pin 18 is
raised
3.2.2 Jumper Straps “JP1” and “JP2”
The Model 2070/Ax uses two jumper straps to select the power
source option and to connect the unit signal ground to frame ground.
Figure 5 (below) shows the position of Jumper Straps JP1 and JP2 on
the bottom side of the Model 2070/Ax PC board.
Figure 6 shows possible settings of jumper straps JP1 and JP2.
JP1 may be positioned on pegs 1 and 2 or on pegs 1 and 3; JP2 may
be positioned on pegs 4 and 6 or on pegs 5 and 6.
ON
1 2 3 4
Figure 5. Location of Strap JP1 and JP2 on the bottom of the Model 2070/Ax PC board
Figure 6. Possible Settings of Jumper Straps JP1 and JP2
1
3
5 2
4
6
Jumpers JP1
& JP2
1
2
3
5
6
JP2
JP1
4