12
8) HML0 + 4B: Bank change-over request register
9) HML0 + 4C: Bank change-over response register (read out only)
These are used when changing the bank of “
1) HML0 + 00 to HML0 + 3F: Data area
.”
First, write a value (“00H to 07H”) in “
8) HML0 + 4B: Bank change-over request register
”
through the computer.
After 1 to 2 refresh times, the control board changes over the bank of, “
1) HML0 + 00 to HML0 +
3F: Data area
” and writes the changed bank number in “
9) HML0 + 4C: Bank change-over re-
sponse register
.”
Notes: 1) In case a number other than “00H” to “07H” is written in “
8) HML0 + 4B: Bank change-over
request register
,” it compulsorily changes bank as “00H.”
2) Do not read out / write in “
1) HML0 + 00 to HML0 + 3F: Data area
” until “
9) HML0 + 4C: Bank
change-over response register
” has been changed over.
10) HML0 + 4D: Transmission stop / Reset
●
In order to stop the transmission of
S-LINK V
system, write “0FH” into HML0 + 4D. In order to
restart it, write in the reset command.
●
This resets the
S-LINK V
system. (In case I/O setting has been changed at “
4) I/O setting
switch (SW3, SW4)
” in “
3. Functional Description
,” the change is reflected.)
If “1EH” is written in HML0 + 4D, I/O data is cleared and then reset. In case “2DH” is written, I/O
data is held and then reset. In case a value other than these is written, it is ignored.
●
Even if the transmission mode or I/O control number is changed, the setting is not changed with
this reset command.
Notes: 1) Once each command of bit 0 to 4 is executed, the bit value does not return to the original value.
In order to execute the next command, write “0” into the bit corresponding to HML0 + 49 once and
check that the bit corresponding to HML0 + 4A has turns to “0” prior to the execution.
2) “System set” and “Command” cannot be executed during an interruption occurrence. Only
clearance of the interruption can be carried out.
1
0
1
0
Command execution request register
Command completion response register
The order of priority for each command of bit 0 to 3 is
bit 0 > 1 > 3 > 2.
Command
Execution
bit 2: “Default”
After “1” is written in, all the setting items are set to the initial conditions (Transmission
mode: A mode, I/O control numbers: 512) by reset (HML0 + 4D), and the address informa-
tion of the recognized units is cleared. If “1” is written into HML0 + 49 bit 2, HML0 + 4A bit 2
turns to “1” after the completion of the default setting. Then, execute the reset (HML0 + 4D).
bit 3: “System set”
It reads in the
S-LINK V
I/O unit connection state at that time. If “1” is written into HML0 +
49 bit 3, HML0 + 4A bit 3 turns to “1” after the completion of system setting.
bit 4: “Interruption indication”
In case interruption has occurred, HML0 + 4A bit 4 turns to “1.” In order to clear this, write
“1” into HML0 + 49 bit 4 to execute, and the clearance is completed when HML0 + 4A bit 4
turns to “0.” In case “0” is written into HML0 + 49 bit 4, it is ignored. After the clearance, in case
HML0 + 49 bit 4 does not return to “0,” it will be cleared soon after the next interruption occurs.
bit 5: “Busy indication”
When the Busy indicator lights up, such as during system setting, “1” is indicated in HML0 +
4A bit 5. After the Busy state is over, it turns to “0.“
Even if written into HML0 + 49 bit 5, this will be ignored.
bit 6: “On Hold indication”
In case the input hold is effective (HML0 + 4E bit 0 is “1”), the current state is indicated with
Hold “1” or the state before Hold with “0.” When Hold cancel (HML0 + 4E bit 0 is “0”) is set,
it returns to “0.”
bit 7: “Command under execution indication”
After the receipt of each command of HML0 + 49 bit 0 to 4, HML0 + 4A bit 7 turns to “1” until
the command completion. When the command execution is completed, it turns to “0.” This
bit allows you to check if a command has been received.
