Panasonic KX-TDA0187, Manual

Page: 18 / 66

7.1.2. Chip Select Logic
Table.5.2 Table of Chip Select Terminals
Terminals Function
used
Wait Function
(Numeral is no. of
clocks.)
Remarks
CS
Terminals
Individual
Output (1)
Individual
Output (2)
nCS0 (area
0)
- - nCS0 1+Programable or 1+
ProgWAIT
Terminals
Used for Flash memory
nCS1 (area
1)
nCASH
(DRAM)
- nCS1 Read 1/Write 2 or 2+
WAIT Terminals
Used for ASIC (IC2)
nCS2 (area
2)
- - nCS2 1+Programable or 1+
ProgWAIT
Terminals
Used for SRAM (Basic)
Work Area
nCS3 (area
3)
nCASL
(DRAM) - nCS3 Read 1/Write 2 or 2+
WAIT Terminals
CS Reserve
nCS4 (area
4)
PA0 (I/O) TIOCA0
(Timer)
nCS4 Read 1/Write 2 or 2+
WAIT Terminals
CS Reserve
nCS5 (area
5)
PA1 (I/O) nRAS (DRAM) nCS5 Read 1/Write 2 or 2+
WAIT Terminals
CS Reserve
nCS6 (area
6)
PA2 (I/O) TIOCB0
(Timer)
nCS6 1+Programable or 1+
ProgWAIT
Terminals
Used for peripheral
Used for framer IC,
CS.
nCS7 (area
7)
PA3 (I/O) nWAIT nWAIT Read 1/Write 2 or 2+
WAIT Terminals
Used for Input Wait
Terminals.
Table.5.3 Table of Chip Select Port allocation
Chip Select Address Device Bit
Wide
Assignment
Device
Bus Cycle Remarks
nCS0
0000000h
l
0FFFFFFh
16bit
Flash
(IC5)
2 Clock (1+Long
Wait1) Port allocation of word by
static bus sizing Bus cycle
has same setting as Area
(nCS2).
nCS1
1000000h
l
1FFFFFFh
8bit
ASIC
(IC2)
2+WAIT Terminals Port allocation of byte by
static bus sizing.
nCS2
A000000h
l
AFFFFFFh
16bit
SRAM
(IC3)
2 Clock (1+Long
Wait1) Port allocation of word by
static bus sizing Bus cycle
has same setting as Area
(nCS0).
nCS6
6000000h
l
6FFFFFFh
8bit
T1_IC
(IC302)
3 Clock (1+Long
Wait2) Port allocation of byte by
static bus sizing.
18