Understanding PCIe Root Complex Connections
PCIe slots are available. In addition, all 16 PCIe slots are still available even if PM1 goes
offline.
The port ID values shown in the diagram correspond to the pci@ values reported in the
showdevs
command output.
PCIe Slot
Device Path
MR
IOS
RP
Maximum
bandwidth
Slot 1
/pci@305/pci@2
MR0
0
1
x8
Slot 2
/pci@305/pci@1
MR0
0
0
x8
Slot 3
/pci@306/pci@1
MR0
3
0
x16
Slot 4
/pci@307/pci@1
MR0
2
0
x16
Slot 5
/pci@308/pci@2
MR1
0
1
x8
Slot 6
/pci@308/pci@1
MR1
0
0
x8
Slot 7
/pci@309/pci@1
MR1
3
0
x16
Slot 8
/pci@30a/pci@1
MR1
2
0
x16
Slot 9
/pci@30b/pci@2
MR2
0
1
x8
Slot 10
/pci@30b/pci@1
MR2
0
0
x8
Slot 11
/pci@30c/pci@1
MR2
3
0
x16
Slot 12
/pci@30d/pci@1
MR3
1
0
x16
Slot 13
/pci@30e/pci@2
MR3
0
1
x8
Slot 14
/pci@30e/pci@1
MR3
0
0
x8
Slot 15
/pci@30f/pci@1
MR3
3
0
x16
Slot 16
/pci@310/pci@1
MR3
2
0
x16
If you are reviewing root complex changes after adding a second processor module, return to
“Server Upgrade Process” on page 56
Related Information
■
■
“Server Upgrade Process” on page 56
■
“PCIe Card Configuration” on page 168
■
“PCIe Carrier Handle and LEDs” on page 169
■
“Determine Which PCIe Card Is Faulty” on page 170
■
“Remove a PCIe Card Carrier” on page 171
Servicing PCIe Cards
167
Summary of Contents for SPARC T7-4
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