IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -14
Q4700 : ICL3221ECVZ (RS-232 Transmitter/Receiver)
BLOCK DIAGRAM
TERMINAL DESCRIPTION
PIN CONFIGURATION
TX-SR806/SA806
EN
C1+
V+
C1-
C2+
C2-
V-
R1
IN
FORCEOFF
GND
T1
OUT
FORCEON
T1
IN
R1
OUT
V
CC
INVALID
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
N
O
I
T
C
N
U
F
N
I
P
V
CC
System power supply input (3.0V to 5.5V).
V+
Internally generated positive transmitter supply (+5.5V).
V-
Internally generated negative transmitter supply (-5.5V).
GND
Ground connection.
C1+
External capacitor (voltage doubler) is connected to this lead.
C1-
External capacitor (voltage doubler) is connected to this lead.
C2+
External capacitor (voltage inverter) is connected to this lead.
C2-
External capacitor (voltage inverter) is connected to this lead.
T
IN
TTL/CMOS compatible transmitter Inputs.
T
OUT
RS-232 level (nom/- 5.5V) transmitter outputs.
R
IN
RS-232 compatible receiver inputs.
R
OUT
TTL/CMOS level receiver outputs.
R
OUTB
TTL/CMOS level, noninverting, always enabled receiver outputs.
INVALID
Active low output that indicates if no valid RS-232 levels are present on any receiver input.
EN
Active low receiver enable control; doesn’t disable R
OUTB
outputs.
SHDN
Active low input to shut down transmitters and on-board power supply, to place device in low power mode.
FORCEOFF Active low to shut down transmitters and on-chip power supply. This overrides any automatic circuitry and FORCEON (See Table 2).
FORCEON
Active high input to override automatic powerdown circuitry thereby keeping transmitters active. (FORCEOFF must be high).
15
V
CC
T1
OUT
T1
IN
T
1
0.1uF
+0.1 F
+
0.1 F
11
13
2
4
3
7
V+
V-
C1+
C1-
C2+
C2-
+
0.1 F
5
6
R1
OUT
R1
IN
R
1
8
9
5k
C
1
C
2
+ C
3
C
4
EN
1
GND
+3.3V
+
0.1µF
14
TT
L
/C
M
OS
LOGIC LEVEL
S
RS
-232
LE
VELS
FORCEON
FORCEOFF
12
16
V
CC
10
INVALID
TO POWER
CONTROL
LOGIC
u
u
u
