IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -26
Q3461, Q3561 : IS42S32200E-6TL (64 Mbit SD RAM)
BLOCK DIAGRAM
TX-SR806/SA806
CLK
CKE
CS
RAS
CAS
WE
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
BA0
BA1
A10
COMMAND
DECODER
&
CLOCK
GENERATOR
MODE
REGISTER
REFRESH
CONTROLLER
REFRESH
COUNTER
SELF
REFRESH
CONTROLLER
ROW
ADDRESS
LATCH
MUL
TIPLEXER
COLUMN
ADDRESS LATCH
BURST COUNTER
COLUMN
ADDRESS BUFFER
COLUMN DECODER
DATA IN
BUFFER
DATA OUT
BUFFER
DQM0-3
DQ 0-31
V
DD
/V
DDQ
GND/GNDQ
11
11
11
11
32
32
32
32
256
(x 32)
2048
2048
2048
R
O
W DECODER
2048
MEMORY CELL
ARRAY
BANK 0
SENSE AMP I/O GATE
BANK CONTROL LOGIC
ROW
ADDRESS
BUFFER
