TERMINAL DESCRIPTION(10/10)
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -52
Q8200: FLI30336 (Video Processor, TORINO)
TX-SR806/SA806
Clock Synthesis
AP
AG
AP
AG
AO
AI
O
C25
A25,A26
D26
B25
B26
C26
D25
RPLL power supply (1.8V)
RPLL analog ground.
RPLL power supply (3.3V)
RPLL digital ground.
Output to external crystal.
Reference clock input for external crystal connection.
No connect.
RPLL_18
RPLL_AGND
RPLL_33
RPLL_DGND
XTAL
TCLK
N/C
Pin name Pin# I/O Description
Low Bandwidth ADC
AP
AG
I
I
I
I
I
I
I
AC9
AC11
AF10
AE10
AD10
AC10
AF11
AE11
AD11
Row bandwidth ADC analog VDD (3.3V)
Row bandwidth ADC ground.
Analog input channel 1 for low bandwidth ADC.
Analog input channel 2 for low bandwidth ADC.
Analog input channel 3 for low bandwidth ADC.
Analog input channel 4 for low bandwidth ADC.
Analog input channel 5 for low bandwidth ADC.
Analog input channel 6 for low bandwidth ADC.
Signal return path for channels 1 to 6 of low band ADC.
LBADC_3.3
LBADC_GND
LBADC_IN1
LBADC_IN2
LBADC_IN3
LBADC_IN4
LBADC_IN5
LBADC_IN6
LBADC_RETURN
Pin name Pin# I/O Description
Digital Power Supply
P
P
G
K10,K11,K16,K17,
L11,L16,T11,T16,T17
U10,U11,U16,U17
E4,F4,G4,H4,J4,K4,
L4,AC14,AC16,AC18,
AC22,AB23,Y23,V23,
T23,P23,M23
L10,M10,N10,P10,
R10,T10,M11,N11,
P11,R11,K12,L12,
M12,N12,P12,R12,
T12,U12,K13,L13,
M13,N13,P13,R13,
M14,N14,P14,R14,
T14,U14,K15,L15,
M15,N15,P15,R15,
T15,U15,M16,N16,
P16,R16,L17,M17,
N17,P17,R17
1.8V VDD for core supply.
3.3V VDD for I/O.
Ground for core 1.8V SSTL2 2.5V, and I/O 3.3V
power supplies.
CORE_1.8
IO_3.3
D_GND
Pin name Pin# I/O Description
